MiSTer FPGA Forum

So, any news for the RTG part?

Forgive my ignorance, but is it functional already somewhere?

As I'm rather new to this whole scene, is there a direct way of running it on the DE10?

Interesting, can this work be used to compile a core for MiSTer?

About the CPU, what about this project?
http://eab.abime.net/showpost.php?p=141 ... tcount=308

@Mike
Thanks. I was merely interested if we're talking several months or some weeks from now on.
So I'm really eager to look into it once something can be delivered.
Thanks!

Mike, is there any estimation on the timeline?
Only a very rough one, of course.

Because it's hard coded and settings in the file are ignored.

Ah, looks like a good way of implementing a "cleaner" hack. Thanks for the hint.

From the Amiga side, 230k runs fine even for "larger" downloads (15 mins).

I wonder where the limitation comes from that 460k fails. I suspect the Amiga serial device can't handle it properly.

I'm not a developer, but interested in your approach.
By exposing a filesystem you refer to a block-level SCSI-like device?

Talking about PPP.

Was anyone able to activate 460k on the PPP connection with the internal serial.device of Miami?
I'm stuck at 230k which is not too bad and gives about 22 KBps.