Genesis Core Ported to Terasic DE2-115

[mindstation]

Hello. I'm porting MiSTer Genesis core to Terasic DE2-115 board (Cyclone IV E).
Now my port is able to run "Sonic 3D Blast", but it stucks in many places.

I tried to made ModelSim testbench for the core, but got compilation errors like this:

Code: Select all

# -- Compiling module scandoubler
# ** Error: /home/github/DE2_115_Genesis/sys/scandoubler.v(61): Declarations not allowed in unnamed block.
# ** Error: /home/github/DE2_115_Genesis/sys/scandoubler.v(117): (vlog-2730) Undefined variable: 'hbo'. 

It looks like the core didn't compile in Modelsim.

I have a question. How is MiSTER Genesis testing under development? Altera SignalTap? Other?

[Captain FPGA]

Wtf there's another Terasic DE Nano?! I'm assuming FPGA and video game potential, by extension more powerful cores are a safe bet?

EDIT: Upon further inspection I realize that board is old. Came out around 8 years ago. I think the nano has more RAM but this thing does run cores like NES.

I'm sure I'm mistaken on some or all of this, feel free to correct me!

How I missed this all these years is beyond me.

[robinsonb5]

Hello. I'm porting MiSTER Genesis core to Terasic DE2-115 board (Cyclone IV E).

I have a question. How is MiSTER Genesis testing under development? Altera SignalTap? Other?

Nice project! How are you handling the ARM stuff? An external board, or a softcore on the FPGA?

You might be better off using the MiST version of the Genesis core since that's more similar capability- and technology-wise (VGA out, SDRAM but no DDR3)

As for debugging, I can't speak for other devs, but I tend to simulate individual components using GHDL or Verilator, and debug complete cores with Signaltap.

Wtf there's another Terasic DE Nano?! I'm assuming FPGA and video game potential, by extension more powerful cores are a safe bet?

There's loads of DE-series boards - I have a DE1, a DE2 (original version Cyclone II) and DE10L-Lite right here, as well as the DE10-Nano.

The DE2-115 is an interesting board - nice big FPGA, loads of BRAM, 128 Meg of SDRAM which is both twice the bus width of MiSTer 128 Meg modules, and also not crippled for bank-interleaving. On the downside, only VGA out, so no upscaling, fancy filtering or frame-rate conversion.

[Captain FPGA]

Hello. I'm porting MiSTER Genesis core to Terasic DE2-115 board (Cyclone IV E).

I have a question. How is MiSTER Genesis testing under development? Altera SignalTap? Other?

Nice project! How are you handling the ARM stuff? An external board, or a softcore on the FPGA?

You might be better off using the MiST version of the Genesis core since that's more similar capability- and technology-wise (VGA out, SDRAM but no DDR3)

As for debugging, I can't speak for other devs, but I tend to simulate individual components using GHDL or Verilator, and debug complete cores with Signaltap.

Wtf there's another Terasic DE Nano?! I'm assuming FPGA and video game potential, by extension more powerful cores are a safe bet?

There's loads of DE-series boards - I have a DE1, a DE2 (original version Cyclone II) and DE10L-Lite right here, as well as the DE10-Nano.

The DE2-115 is an interesting board - nice big FPGA, loads of BRAM, 128 Meg of SDRAM which is both twice the bus width of MiSTer 128 Meg modules, and also not crippled for bank-interleaving. On the downside, only VGA out, so no upscaling, fancy filtering or frame-rate conversion.

I'm good with VGA. Does normal Mister cores work on the DE2-115? Also in theory would it be possible for our DE2-115 to run cores the Mister can't? (i.e. Dreamcast, NAOMI, CPS3)

[robinsonb5]

I'm good with VGA. Does normal Mister cores work on the DE2-115?

Not out of the box - they need porting. There's no ARM onboard - so that functionality has to be replicated somewhere else (either an external board, or in a soft CPU running on the FPGA.) As I said, It would be easier to port MiST cores than MiSTer cores, because the former won't expect to have DDR3 RAM or HDMI scaling available. (One of my projects in recent months has been to port some MiST cores - including Megadrive - to the Turbo Chameleon 64 - which again has no ARM.)

Also in theory would it be possible for our DE2-115 to run cores the Mister can't? (i.e. Dreamcast, NAOMI, CPS3)

In theory, maybe - the SDRAM can shift twice as much data on each cycle, and can overlap requests to different banks more easily, so there's a nice lot of fast low-latency RAM available (but on the other hand there's no DDR3 bulk-but-high-latency RAM). In practice, it's not a likely target for a new high-profile core simply because it's not what end users have. (if end users eventually need to upgrade for cutting-edge cores, they'll expect to upgrade to something more modern than this.)

[jca]

The DE2-155 may be a nice board but the price isn't: $675.00.

[Captain FPGA]

The DE2-155 may be a nice board but the price isn't: $675.00.

Perhaps it will go down some day.

Robinsonb5 thx for explaining that.

[mindstation]

Nice project! How are you handling the ARM stuff? An external board, or a softcore on the FPGA?

As for debugging, I can't speak for other devs, but I tend to simulate individual components using GHDL or Verilator, and debug complete cores with Signaltap.

Currently my main goal is a Genesis core for DE2-115.

I decided to cut off any ARM stuff and removed HPS controller from the project.
It was replaced by hard stated "status" register for settings, and some wires connected with zero or one.
ROM loading stuff I replaced by simple controller. The controller copy a ROM image from onboard Flash memory to SDRAM.

I'm using original VGA and audio out code from MiSTER Genesis core for video and I2S audio.
Video is good, but audio makes loud noise with some music in the background

I have add GHDL to my familiarize myself tech list. Thanks for info!

Also in theory would it be possible for our DE2-115 to run cores the Mister can't? (i.e. Dreamcast, NAOMI, CPS3)

There is a project specially for DE2-115. pgate1 develops a Playstation core:
https://github.com/pgate1/PlayStation_on_FPGA
It's written at SFL+ (proprietary language, there is not cost free compiler).

[robinsonb5]

I decided to cut off any ARM stuff and removed HPS controller from the project.
It was replaced by hard stated "status" register for settings, and some wires connected with zero or one.
ROM loading stuff I replaced by simple controller. The controller copy a ROM image from onboard Flash memory to SDRAM.

Oldskool! That's how things used to work in the DE1 days - upload a ROM into the flash and run it from there!

Sounds like a fun project!

I'm using original VGA and audio out code from MiSTER Genesis core for video and I2S audio.
Video is good, but audio makes loud noise with some music in the background

Perhaps a numerical overflow when the FM and PSG sounds are mixed? Also check that you're toggling the I2S "word" signal one bit before you start transmitting the other channel - i.e. it toggles with the LSB of the old channel, not with the MSB of the new channel.

[mindstation]

It's alive!

"audio makes loud noise with some music in the background"

The wrong audio codec mode did the noise. I have set "left justified" mode instead I2S.
I2S codec mode fix the audio.

"Now my port is able to run "Sonic 3D Blast", but it stucks in many places."

My other mistake. I decided that the ROM size is word count, not bytes.
And size in 16-bit words is less twice compare with size in bytes. A small count of games can start after the halving. "Sonic 3D Blast" is one of them
Now the ROM size is calculated in bytes and all works fine.

I have refused a full core simulation idea and use SignalTap, mame emulator and TANGLEWOOD open source game for debug.
ModelSim testbenches are only used to test my modules.

The DE2-115 Genesis project on GitHub:
https://github.com/mindstation/DE2_115_Genesis

[robinsonb5]

It's alive!

Awesome - nice work! Thanks for sharing.

[mathieulh]

Nice project! How are you handling the ARM stuff? An external board, or a softcore on the FPGA?

As for debugging, I can't speak for other devs, but I tend to simulate individual components using GHDL or Verilator, and debug complete cores with Signaltap.

Currently my main goal is a Genesis core for DE2-115.

I decided to cut off any ARM stuff and removed HPS controller from the project.
It was replaced by hard stated "status" register for settings, and some wires connected with zero or one.
ROM loading stuff I replaced by simple controller. The controller copy a ROM image from onboard Flash memory to SDRAM.

I'm using original VGA and audio out code from MiSTER Genesis core for video and I2S audio.
Video is good, but audio makes loud noise with some music in the background

I have add GHDL to my familiarize myself tech list. Thanks for info!

Also in theory would it be possible for our DE2-115 to run cores the Mister can't? (i.e. Dreamcast, NAOMI, CPS3)

There is a project specially for DE2-115. pgate1 develops a Playstation core:
https://github.com/pgate1/PlayStation_on_FPGA
It's written at SFL+ (proprietary language, there is not cost free compiler).

To be fair, a board like the DE-10 NANO with both an ARM/DDR3 and a Cyclone V all in one, is an oddity rather than the norm, if we want to future proof things we should use a regular FPGA board and interface it with something such as a Raspberry Pi to replace the HPS side of things.