Developing MiSTer Core Through Mame

[Mr^O^BIG]

Hi, I'm wondering if it's possible to develop mister core using mame database works

Mr BIG

[ExCyber]

I'm not sure I understand what you're asking. MAME can be a very useful reference for implementing a core, but a direct translation isn't possible because MAME simply isn't structured the same way that a core is, and it tends to not be very strict about some hardware details that are much more important for a core, especially:

• RAM organization (e.g. emulating a 16-bit RAM where the real hardware has an 8-bit RAM)
• different access times on different devices (sometimes compensated by changing the emulated CPU clock)
• DMA operations halting the CPU or inserting wait states

I suppose that with SystemC or Verilator it could potentially be useful to have an approach that starts with MAME emulating everything and replaces components with HDL until a working core is produced. However, I'm not sure how much work it would be to adapt the MAME code to that kind of model.

[RndMnkIII]

MAME can be considered as a valuable tool both for the information provided by its source code and for being used as a debugging platform, but it cannot be a direct replacement of software for hardware since to model all the subtleties of the hardware a description is necessary much more precise of its operation that currently cannot be executed in real time through software. Software solutions currently resort to simplifications of hardware execution to achieve their benefits at the cost of not offering a 100% reliable reproduction.

[jca]

Interesting:
https://twitter.com/topapate/status/1500477220061597699

[dmckean]

Interesting:
https://twitter.com/topapate/status/1500477220061597699

This link goes nowhere.

[jca]

Interesting:
https://twitter.com/topapate/status/1500477220061597699

This link goes nowhere.

It is gone, it was a more detailed tweet from this original one.
https://twitter.com/topapate/status/150 ... ChyNIpAAAA
Hope it is working.