SparcStation Core

jca
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Re: SparcStation Core

Unread post by jca »

It looks like it has been detected as a controller, not a mouse. I have a mouse and never saw the message you mentioned.
puu
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Re: SparcStation Core

Unread post by puu »

There is a bug in the initialization part of RTC.
There is no "minute" setting in ts_rtc.vhd.
Substitution to mem_i is required near line 246.
Since the "minute" of the bit position of rtcinit is 13 down to 8, further digits need to be shifted by 8 bits.
Also, when the "second" counter advances, cpt_ * will initialize it based on mem_ *, so cpt_ * also needs to be assigned from rtcinit at the timing of rtcset = 1.
Since rtcinit is generated by ss_core.vhd, it is necessary to increase the amount of "minutes" in this part as well. However, since the bit arrangement of rtcinit and rtc input below "year" is the same, it seems that there is no problem even if the "second" to "year" parts are continuously assigned.
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thisisamigaspeaking
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Re: SparcStation Core

Unread post by thisisamigaspeaking »

Amazing, thanks!
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Re: SparcStation Core

Unread post by Eisengrim »

I'd like to get this core running but am not having any luck. My MiSTer recognizes the ss5.rbf, and I have rh.raw in Games/SparcStation. The screen I get on boot is an OpenBios screen that says Trying disk:a... then Trying disk... then "No valid state has been set by load or init-program".
In the OSD menu SCSI: is set to Image. HD *.RAW is blank. When I select rh.raw in the MiSTer menu it doesn't populate in the menu like other disk images do in other cores - HD *.RAW remains blank. I put boot.rom in BIOS/SparcStation and it's selectable when renamed to BIOS.rom.
If I use the RESET menu option it just goes through trying disks again.
Can anyone help?

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Re: SparcStation Core

Unread post by Eisengrim »

thera34 wrote: Sat Apr 02, 2022 2:21 pm
jca wrote: Sat Apr 02, 2022 2:00 pm

So far I have been unable to boot anything, I always get "No valid state has been set by load or init-program".
Before I give it a rest and finish my new MISTer setup I have a few question?
What is the version and date displayed by OpenBios? At this time I have 1.1 from 4/30/2020. At one time during my experiments I think I saw 1.4 but I am not sure.
So far it looks like only NeXTSTEP is able to run and may be Etch as per mapf.
For NeXTSTEP:
Which settings did you change in the OSD?
The note says to type -v at the boot menu. What does this mean? -v is not a command and boot -v gives the same error as mentioned previously.

If you get "No valid state message", mount a raw image and issue "boot" on the prompt

For NeXTSTEP
On OSD: L2TLB from ON to OFF and IOMMU rev from 26(Default) to 11(Next)
After that, loaded OpenBios v1.1, mounted next.raw and after few mins a message will appear to press "-v"
I hited that, and when prompted for a "Ctrl+C" for networking part, do so and it's good to go

This was helpful, thanks. I was choosing OSD RESET and that was doing nothing.

schlika
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Re: SparcStation Core

Unread post by schlika »

Hi All Sparc lovers !

I just re-setup my MiSTer (new 512Go sd !), and redownloaded latest SS5 + boot.rom files to my system.

SCSI is set to "Image", HD loads the correct raw image, settings according to .txt files (no trace of WB/AOW settings anymore apparently)

I cannot boot into any image ... I get the "No valid state has been set by load or init-program" error from the OpenBIOS prompt (v1.1 built on May 9 2022 23:06), SS5 core is v220604. It used to work fine before ... trying all boot disk / boot disk:a ... does not help ...

"dev /aliases .properties" looks ok ?

.
disk "/iommu/sbus/espdma/esp/sd@0,0"
.

Any idea ?

Thanks !

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Re: SparcStation Core

Unread post by schlika »

OK, answering to myself ... if that happens, go back to the core menu, re-"insert" the disk raw image, and type "boot" again (no reset) ... works now ;)

schlika wrote: Tue Feb 27, 2024 9:46 am

Hi All Sparc lovers !

I just re-setup my MiSTer (new 512Go sd !), and redownloaded latest SS5 + boot.rom files to my system.

SCSI is set to "Image", HD loads the correct raw image, settings according to .txt files (no trace of WB/AOW settings anymore apparently)

I cannot boot into any image ... I get the "No valid state has been set by load or init-program" error from the OpenBIOS prompt (v1.1 built on May 9 2022 23:06), SS5 core is v220604. It used to work fine before ... trying all boot disk / boot disk:a ... does not help ...

"dev /aliases .properties" looks ok ?

.
disk "/iommu/sbus/espdma/esp/sd@0,0"
.

Any idea ?

Thanks !

kconger
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Re: SparcStation Core

Unread post by kconger »

I was recently reminded of Wabi, so I've updated my image to include it.

wabi.png
wabi.png (131.72 KiB) Viewed 3196 times
leosam
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Re: SparcStation Core

Unread post by leosam »

Not sure if this topic is still alive but I have just found it, and it got me super excited!

I have an ML605 virtex 6 development board that seems as the next step above the SP605. Does anyone think its possible to run the Sparcstation 5/20 on it?

If yes, how should I proceed to change the relevant stuff to be able to convert to the Virtex 6.

Thanks

Ps: I'm an electrical engineer but a total FPGA noob

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Grabulosaure
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Re: SparcStation Core

Unread post by Grabulosaure »

leosam wrote: Fri Jul 19, 2024 3:11 pm

Not sure if this topic is still alive but I have just found it, and it got me super excited!

I have an ML605 virtex 6 development board that seems as the next step above the SP605. Does anyone think its possible to run the Sparcstation 5/20 on it?

If yes, how should I proceed to change the relevant stuff to be able to convert to the Virtex 6.

Thanks

Ps: I'm an electrical engineer but a total FPGA noob

Well, it is possible, but not easy.

This is not like the MiSTer, there is no host CPU to handle USB peripherals or BOOT ROM loading.

Virtex is larger and faster than Spartan.

You need :

  • Install old Xilinx ISE software and find a license for your Virtex Chip. I think it's free now. Find a way to run it on Linux or Windows, maybe it will need a VM. There are probably sample projects for your board.

  • Hack some interfaces. You need a dozen 3.3V GPIOs to solder an SD card connector (because the CompactFLASH interface is awfully slow) a keyboard, and mouse. For the keyboard and mouse, you need either a genuine SparcStation keyboard, or with a PS/2 interfaces, or adapter.

  • Adapt the design : Update the .XDC pinout definition file (video, hard disk, keyboard, mouse, ethernet...), probably the DRAM memory controller, maybe some issue with boot FLASH.

Image

leosam
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Re: SparcStation Core

Unread post by leosam »

Thanks for the answer.

I guess its worth a try. I'll use my vacation days during august to give it a try. Everything you said seems ok, besides dealing with the memory controller.

Concerning the keyboard and mouse, well I have a real SS5 at home so from the hardware side I guess I'm okay.

I'll try to keep you posted on my progress.

Leo

Grabulosaure wrote: Mon Jul 22, 2024 10:51 pm
leosam wrote: Fri Jul 19, 2024 3:11 pm

Not sure if this topic is still alive but I have just found it, and it got me super excited!

I have an ML605 virtex 6 development board that seems as the next step above the SP605. Does anyone think its possible to run the Sparcstation 5/20 on it?

If yes, how should I proceed to change the relevant stuff to be able to convert to the Virtex 6.

Thanks

Ps: I'm an electrical engineer but a total FPGA noob

Well, it is possible, but not easy.

This is not like the MiSTer, there is no host CPU to handle USB peripherals or BOOT ROM loading.

Virtex is larger and faster than Spartan.

You need :

  • Install old Xilinx ISE software and find a license for your Virtex Chip. I think it's free now. Find a way to run it on Linux or Windows, maybe it will need a VM. There are probably sample projects for your board.

  • Hack some interfaces. You need a dozen 3.3V GPIOs to solder an SD card connector (because the CompactFLASH interface is awfully slow) a keyboard, and mouse. For the keyboard and mouse, you need either a genuine SparcStation keyboard, or with a PS/2 interfaces, or adapter.

  • Adapt the design : Update the .XDC pinout definition file (video, hard disk, keyboard, mouse, ethernet...), probably the DRAM memory controller, maybe some issue with boot FLASH.

Image

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Re: SparcStation Core

Unread post by J3RK »

I don't currently have a use for this, but just wanted to say this is so cool! My exposure to Sparcs was shell accounts on various early ISPs. :geek:

One of the cooler times in computer history was when Sparcs, Alphas and Indigos were the cool things! I used to go to the huge computer fairs at the University of Washington back then, and it was so fun seeing all the new workstation tech each year.

Now we need an Iris Indigo core. :mrgreen: I could find a use for that I think. :mrgreen:

(probably the "retro-working" that someone mentioned earlier in the thread)

Not sure fitting an R3000/R4400, Motorola 56003, and one of the more advanced graphics solutions would work though. Maybe the base model.

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