The clock output externally should preferably come from a PLL.spark2k06 wrote: ↑Sun Jul 10, 2022 5:40 am
On the other hand, a user told me that although the direct clock of the sdram works well, in many of the MiSTer cores there is a small offset as explained here:
https://github.com/mist-devel/mist-boar ... on-4-sdram
What do you think about it?
It may also be recommended to output from out0.