MiSTer PCXT

[kitune-san]

I am trying 7MHz on the core right now.
It will take time.
Wait.

7 MHz test.
Will not work except for 8088BIOS due to problems with DMA address switching.

[MicroCoreLabs]

I am trying 7MHz on the core right now.
It will take time.
Wait.

7 MHz test.
Will not work except for 8088BIOS due to problems with DMA address switching.

Can you share how you are achieving 7Mhz?

[akeley]

Unfortunately, mentions do not work on this forum

I know, but it's possible to do a nick/name search when writing a PM. Won't hurt to try and contact these folks here or ask on Discord. I won't myself coz I wouldn't know what exactly to ask for...

[kitune-san]

I am trying 7MHz on the core right now.
It will take time.
Wait.

7 MHz test.
Will not work except for 8088BIOS due to problems with DMA address switching.

Can you share how you are achieving 7Mhz?

I changed biu_max.v to run on the edge of the CPU clock.

https://github.com/kitune-san/PCXT_MiST ... 1395356c28

[kitune-san]

Please do not merge this code into the main as it is still experimental.

[kitune-san]

Achieving speeds faster than 7 MHz is more difficult with SDRAM.
It would be better to create a cache or consider SRAM.

[MicroCoreLabs]

I changed biu_max.v to run on the edge of the CPU clock.

Looks good, thanks!

[MicroCoreLabs]

Achieving speeds faster than 7 MHz is more difficult with SDRAM.

Why is this?

[kitune-san]

Achieving speeds faster than 7 MHz is more difficult with SDRAM.

Why is this?

In the current design, as the clock frequency is increased, the sdram read time exceeds the machine cycle time.
The Ready signal can be used, but the effect of increasing clock frequency is reduced.

[MicroCoreLabs]

In the current design, as the clock frequency is increased, the sdram read time exceeds the machine cycle time.
The Ready signal can be used, but the effect of increasing clock frequency is reduced.

SDRAMs usually have sub 100ns access times and the controller is running at 100Mhz, correct? So shouldn't we be able to perform a complete read/write cycle to the SDRAM within a single 8088 clock cycle? Maybe two? Im confused why the increasing the 8088 bus speed would have much of an effect on the SDRAM access time.

To be specific, when an 8088 bus cycle begins at the ALE and when the address is available, you can begin the SDRAM cycle which should complete by the second 8088 clock cycle, leaving two spare 8088 clocks before the end of the cycle. It seems to me that you could complete multiple SDRAM cycles in the time span of a single 8088 bus cycle - even at 7 Mhz+ speeds.

Maybe the issue is that your SDRAM controller is starting late in the 8088 bus cycle because it is not integrated into the BIU. Maybe now is not the time for it, but I suggest you try moving the SDRAM controller, and eventually any mirrored memory controllers, into the BIU controller so that cycles can be kicked off as soon as the MCL86 EU requests the BIU cycle.

This would be convenient when youre ready for maximum acceleration. If the SDRAM cycle was started in BIU-state-0, you could either allow the full four clock cycles to complete so that it is cycle accurate or when you want maximum acceleration you could skip the BIU state machine and complete the cycle as soon as the SDRAM cycle is finished, which would happen in a fraction of a single 8088 clock cycle.

As I said, maybe now is not the time for a change like this, but I wanted to say that increasing the super-slow 4.7Mhz to an equally slow 7Mhz should have virtually no impact on the SDRAM access time. And if it does it indicates that the way SDRAM is being access may need to be modified.

[spark2k06]

Please do not merge this code into the main as it is still experimental.

I have merged these changes with the latest changes from the prebeta 1.4 branch, into a new experimental branch called prebeta 1.4-7mhz.

This way, all users will be able to make use of the 7Mhz coupled with the latest changes with COVOX/DSS and UART up to 921.6K:

https://github.com/spark2k06/PCXT_MiSTe ... 51af85551e

The improvement is very noticeable in games like Prince Of Persia, or Titus The Fox:

PREBETA_1_4_7MHz.jpg (102.79 KiB) Viewed 4190 times

MiSTer_PCXT_7MHz.jpg (108.49 KiB) Viewed 4190 times

[wark91]

For the boot.rom containing the bios and IDE-XTL, it could be great to have two boot roms (for example boot.rom and boottandy.rom).
If on OSD "Model Tandy 1000" is selected and at the reset it will load boottandy.rom and the other case it will be boot.rom.
What do you think ?

[spark2k06]

For the boot.rom containing the bios and IDE-XTL, it could be great to have two boot roms (for example boot.rom and boottandy.rom).
If on OSD "Model Tandy 1000" is selected and at the reset it will load boottandy.rom and the other case it will be boot.rom.
What do you think ?

Not at the moment, when the core becomes part of the official MiSTer repository it will be evaluated, the thing is that changes have to be made to the framework (MiSTer_Main) to support this feature, it has already been thought about, and it is interesting.

[Mills]

I also desperately want someone to develop the PCAT (286) core when the PCXT core is completed. Many of the 286 games are not suitable for running on ao486.

What features/specs would you want to see in a AT/286 core? (assuming it would sit between the XT core and the full featured ao486)

A bit off topic but the first 286's and 8088/86 are more or less in the same league, 286 is much more advanced in some features, but not too much.

386 is a different story, also it is 32 bit, and ao486 does a great job recreating that.

[dmckean]

I also desperately want someone to develop the PCAT (286) core when the PCXT core is completed. Many of the 286 games are not suitable for running on ao486.

What features/specs would you want to see in a AT/286 core? (assuming it would sit between the XT core and the full featured ao486)

A bit off topic but the first 286's and 8088/86 are more or less in the same league, 286 is much more advanced in some features, but not too much.

386 is a different story, also it is 32 bit, and ao486 does a great job recreating that.

A separate thread was created for all this discussion.
viewtopic.php?p=55983#p55983

[suww37]

Please do not merge this code into the main as it is still experimental.

I have merged these changes with the latest changes from the prebeta 1.4 branch, into a new experimental branch called prebeta 1.4-7mhz.

This way, all users will be able to make use of the 7Mhz coupled with the latest changes with COVOX/DSS and UART up to 921.6K:

https://github.com/spark2k06/PCXT_MiSTe ... 51af85551e

The improvement is very noticeable in games like Prince Of Persia, or Titus The Fox:

PREBETA_1_4_7MHz.jpg

MiSTer_PCXT_7MHz.jpg

I tested it and I'm very happy that it got a lot faster. But the speed of the "prince of persia" is still awkward. Perhaps if you improve the speed to 10Mhz, I’ll be able to play fairly smoothly then. Thank you for your hard work

[suww37]

What version of DOS do you use with pcxt core? I've tried MS-DOS 3.31, MS-DOS 3.31 compaq, MS-DOS 5.0, freedos, and MS-DOS 6.21 in pcxt core. MS-DOS 3.31 has a maximum hdd recognizable capacity of 30MB. The conpaq version recognizes HDDs of more than that capacity so I am using this version. However, unlike the actual XT pc, PCXT core varies the operation of the PCXT game depending on the DOS version.

Prince of pesia -> MSDOS 5.00 , freedos version not working

Double dragon -> MSDOS 6.21 not working

Since the recent uart speed update, prince of persia has not been running in 3.31. I'm thinking it to be a PCXT core related to uart hdd. And after the uart speed update and PCXT core 7Mhz, the TETRIS (spectrum holobyte) graphic was broken again. Fix please.

[Newsdee]

I use DOS 6.22

[suww37]

I use DOS 6.22

Does the double dragon work well?

Tetris also wonders if the graphics are coming out normally.

[Mills]

I use DOS 6.22

Does the double dragon work well?

Tetris also wonders if the graphics are coming out normally.

I use 6.22 and double dragon works well, I was told dos 6.22 does not use more ram that older version, it even uses less ram than others like version 5 for example.

[flynnsbit]

I use DOS 6.22

Does the double dragon work well?

Tetris also wonders if the graphics are coming out normally.

I use 6.22 and double dragon works well, I was told dos 6.22 does not use more ram that older version, it even uses less ram than others like version 5 for example.

https://ctrl-alt-rees.com/2021-01-06-wh ... emory.html

Code: Select all

MS-DOS
Version 	Bytes Total 	Bytes Free 	Bytes Used 	Notes
3.30 	654,336 	599,360 	54,976 	 
3.31 	654,336 	598,384 	55,952 	Support for HDD partitions over 32MB
4.00 	655,360 	563,088 	92,272 	 
4.01 	655,360 	569,296 	86,064 	 
4.01c 	655,360 	588,464 	66,896 	 
5.00 	655,360 	583,280 	72,080 	MS-DOS Editor (EDIT.COM) and QBasic added
5.00a 	655,360 	583,280 	72,080 	Bugfix release for the above
6.00 	655,360 	582,192 	73,168 	New disk utlities, DoubleSpace disk compression
6.20 	655,360 	581,472 	73,888 	 
6.21 	655,360 	581,472 	73,888 	DoubleSpace removed
6.22 	655,360 	581,472 	73,888 	DriveSpace added


IBM PC-DOS
Version 	Bytes Total 	Bytes Free 	Bytes Used 	Notes
1.00 	654,336 	642,192 	12,144 	 
1.10 	654,336 	641,936 	12,400 	Double sided disk support
2.00 	654,336 	629,648 	24,688 	Hard Disk Drives, subdirectories, device drivers
2.10 	654,336 	629,648 	24,688 	 
3.00 	654,336 	615,440 	38,896 	Support for larger disks
3.10 	654,336 	615,408 	38,928 	Networking support
3.20 	654,336 	608,368 	45,968 	3.5” 720K floppy support
3.30 	654,336 	599,504 	54,832 	3.5” 1.44MB floppy support, extended partitions
4.00 	655,360 	564,656 	90,704 	DOS Shell, EMS 4.0 support
4.10 	655,360 	564,640 	90,720 	 
5.00 	655,360 	583,248 	72,112 	 
5.00.1 	655,360 	583,232 	72,128 	 
5.02 	655,360 	581,696 	73,664 	 
6.1 	655,360 	590,768 	64,592 	First version after split with MS
6.3 	655,360 	590,752 	64,608 	SuperStor Disk Compression added
7.0 	655,360 	591,568 	63,792 	Memory optimizations, Stacker disk compression, Rexx
2000 	655,360 	591,488 	63,872 	 

[suww37]

I use DOS 6.22

Does the double dragon work well?

Tetris also wonders if the graphics are coming out normally.

I use 6.22 and double dragon works well, I was told dos 6.22 does not use more ram that older version, it even uses less ram than others like version 5 for example.

does the double dragon work dos 6.22 in PCXT_PREBETA_1_4_7Mhz?

[suww37]

Does the double dragon work well?

Tetris also wonders if the graphics are coming out normally.

I use 6.22 and double dragon works well, I was told dos 6.22 does not use more ram that older version, it even uses less ram than others like version 5 for example.

https://ctrl-alt-rees.com/2021-01-06-wh ... emory.html

Code: Select all

MS-DOS
Version 	Bytes Total 	Bytes Free 	Bytes Used 	Notes
3.30 	654,336 	599,360 	54,976 	 
3.31 	654,336 	598,384 	55,952 	Support for HDD partitions over 32MB
4.00 	655,360 	563,088 	92,272 	 
4.01 	655,360 	569,296 	86,064 	 
4.01c 	655,360 	588,464 	66,896 	 
5.00 	655,360 	583,280 	72,080 	MS-DOS Editor (EDIT.COM) and QBasic added
5.00a 	655,360 	583,280 	72,080 	Bugfix release for the above
6.00 	655,360 	582,192 	73,168 	New disk utlities, DoubleSpace disk compression
6.20 	655,360 	581,472 	73,888 	 
6.21 	655,360 	581,472 	73,888 	DoubleSpace removed
6.22 	655,360 	581,472 	73,888 	DriveSpace added


IBM PC-DOS
Version 	Bytes Total 	Bytes Free 	Bytes Used 	Notes
1.00 	654,336 	642,192 	12,144 	 
1.10 	654,336 	641,936 	12,400 	Double sided disk support
2.00 	654,336 	629,648 	24,688 	Hard Disk Drives, subdirectories, device drivers
2.10 	654,336 	629,648 	24,688 	 
3.00 	654,336 	615,440 	38,896 	Support for larger disks
3.10 	654,336 	615,408 	38,928 	Networking support
3.20 	654,336 	608,368 	45,968 	3.5” 720K floppy support
3.30 	654,336 	599,504 	54,832 	3.5” 1.44MB floppy support, extended partitions
4.00 	655,360 	564,656 	90,704 	DOS Shell, EMS 4.0 support
4.10 	655,360 	564,640 	90,720 	 
5.00 	655,360 	583,248 	72,112 	 
5.00.1 	655,360 	583,232 	72,128 	 
5.02 	655,360 	581,696 	73,664 	 
6.1 	655,360 	590,768 	64,592 	First version after split with MS
6.3 	655,360 	590,752 	64,608 	SuperStor Disk Compression added
7.0 	655,360 	591,568 	63,792 	Memory optimizations, Stacker disk compression, Rexx
2000 	655,360 	591,488 	63,872 	 

does the double dragon work dos 6.22 in PCXT_PREBETA_1_4_7Mhz?

[spark2k06]

Updated prebeta 1.4 and prebeta 1.4 7mhz branches:

https://github.com/spark2k06/PCXT_MiSTe ... 0e641f0db7
https://github.com/spark2k06/PCXT_MiSTe ... c60fc7d9d8

• CGA Mode Detection 320x200x4

The Tandy 320x200x16 mode is "high resolution", so identification and use of this mode is easy.


Temporary solution for ghost lines in Tandy BIOS, switch to 200 lines with MODE 200 of Tandy MSDos 3.2:

[wark91]

Great improvement.
The games with CGA 4 colors on Tandy Mode show the right color !

[suww37]

Updated prebeta 1.4 and prebeta 1.4 7mhz branches:

https://github.com/spark2k06/PCXT_MiSTe ... 0e641f0db7
https://github.com/spark2k06/PCXT_MiSTe ... c60fc7d9d8

• CGA Mode Detection 320x200x4

The Tandy 320x200x16 mode is "high resolution", so identification and use of this mode is easy.


Temporary solution for ghost lines in Tandy BIOS, switch to 200 lines with MODE 200 of Tandy MSDos 3.2:

After the uart HDD speed update, if I run Tetris (Spectrum Holobyte) on the pcxt core, the graphics break at a certain level. Is there any solution?

[spark2k06]

Updated prebeta 1.4 and prebeta 1.4 7mhz branches:

https://github.com/spark2k06/PCXT_MiSTe ... 0e641f0db7
https://github.com/spark2k06/PCXT_MiSTe ... c60fc7d9d8

• CGA Mode Detection 320x200x4

The Tandy 320x200x16 mode is "high resolution", so identification and use of this mode is easy.


Temporary solution for ghost lines in Tandy BIOS, switch to 200 lines with MODE 200 of Tandy MSDos 3.2:

After the uart HDD speed update, if I run Tetris (Spectrum Holobyte) on the pcxt core, the graphics break at a certain level. Is there any solution?

I don't know, but I find it hard to believe that the reason is the increase in UART speed, if it happens "randomly", it would also happen earlier.

[suww37]

Updated prebeta 1.4 and prebeta 1.4 7mhz branches:

https://github.com/spark2k06/PCXT_MiSTe ... 0e641f0db7
https://github.com/spark2k06/PCXT_MiSTe ... c60fc7d9d8

• CGA Mode Detection 320x200x4

The Tandy 320x200x16 mode is "high resolution", so identification and use of this mode is easy.


Temporary solution for ghost lines in Tandy BIOS, switch to 200 lines with MODE 200 of Tandy MSDos 3.2:

After the uart HDD speed update, if I run Tetris (Spectrum Holobyte) on the pcxt core, the graphics break at a certain level. Is there any solution?

I don't know, but I find it hard to believe that the reason is the increase in UART speed, if it happens "randomly", it would also happen earlier.

It doesn't seem to happen randomly. When I used the beta of your pcxt core 1.3 beta, this symptom disappeared and I found that you solved this problem completely.



beta 1.3

https://github.com/spark2k06/PCXT_MiSTe ... 45d237b7a4
Unified chipset clock at 100 MHz.
Changed read signal to uart module.
Changed cen_opl2 signal.
Improved access speed to SDRAM.
Control sdram refresh execution timing.
Fixed KF8237.
Wired between Timer 1 output and DMA0 request.
Fix VRAM CGA and loader for XTIDE.
IBM5160 BIOS downloader.
Fix indentations in make_boot_with_ibm5160.
Tandy graphics selectable from the OSD.
EMS pages frame update.
fix a comment on addressable memory.
boot.rom up to 64Kb + 16Kb for XTIDE.
Dummy LPT1.
Update of ROM download scripts.
Simple improvements to PCXT.sdc.
Correct use of address_enable_n signal in ports and memory accesses.
Initial improvements in Tandy sound implementation.
Improvements to the implementation of Tandy video
In this version, in addition to the Tandy mode, the palette switching feature also works:

[spark2k06]

I insist, it seems strange to me that it is a problem of the UART speed, but is it possible that you are using the experimental 7Mhz version? That might make more sense.

In any case, if it's the UART speed, it's not necessary to change the core, in the script set it to 115.2K and it will work anyway, but at the previous speed.

[thisisamigaspeaking]

I insist, it seems strange to me that it is a problem of the UART speed, but is it possible that you are using the experimental 7Mhz version? That might make more sense.

In any case, if it's the UART speed, it's not necessary to change the core, in the script set it to 115.2K and it will work anyway, but at the previous speed.

Is there anything that depends on the UART clock other than the UART itself?

edit: Although if there were anything like that, there would be far more widespread and immediate problems from changing it...