Commodore 128 for the MiSTer?

[Bas]

Let me just say that I'm incredibly thankful for this development!

[Alynna]

I should have a release soon I want to rebase with eric's work first. But one thing that seems to be working is ...

Screenshot 2022-06-12 172533.jpg (186.3 KiB) Viewed 12892 times

Mechanism:
1) Check $D50b. If the value there is "82" then 16mb RAM is enabled. Version 2 MMU, (2^8) banks, or (64*256)k RAM.
2) To access, poke a value 0-255 in $d50c. A 64k page from the 16mb RAM space will be mapped to bank 2.
3) Or, poke a value 0-255 in $d50d. A 64k page from the 16mb RAM space will be mapped to bank 3.

Yes you can move the VIC to bank 2 or 3. Start thinking what you can do with that

[Alynna]

status for other things. I havent worked on anything with a - yet.
85816 is entirely not stable, but the fact that it starts up at all (and BASIC immediately freaks out, and it looks like there are some timing issues), means its feasible to get this working. In fact run/stop restore is still responsive in 85816 mode.

The VDC RAM may already be exposed, I need to find out where the VDC ended up in memory. If it can be mapped into the lower 16mb, then you will be able to page it into bank 2 or 3 and access the RAM directly...

[Alynna]

I am getting ready for a release, I have got all of Erik's changes merged into mine and are running some basic tests.

The 16mb MMU is done but I am still having problems with actually getting it to access all 16mb. Something is clipping my extra bits somewhere. But i'll find it and thats it for that. But let me introduce you to the registers for MMUv2

Code: Select all

Mister C128 version 2 MMU registers
----------------------------------- 
Address Label   Description
IO:D500 MMUCR1  Configuration register
                7-6 MMU bank mapped to CPU (0-3)
                5-4 ROM HI mapping (00=System; 01=IntRom; 10=ExtRom; 11=RAM)
                3-2 ROM MID mapping (00=System; 01=IntRom; 10=ExtRom; 11=RAM)
                1   ROM LOW mapping (0=System; 1=RAM)
                0   I/O at $D000 (1=Yes; 0=No)
IO:D501 PCRA    Preconfiguration register A as above (triggered at FF01)
IO:D502 PCRB    Preconfiguration register B as above (triggered at FF02)
IO:D503 PCRC    Preconfiguration register C as above (triggered at FF03)
IO:D504 PCRD    Preconfiguration register D as above (triggered at FF04)
IO:D505 MMUMCR  Mode configuration register
                7   40/80 key sense (1=80; 0=40)
                6   OS mode (0=C128; 1=C64)
                5   /EXROM sense
                4   /GAME sense
                3   FSDIR
                2   Unused
                1   Unused (Future: 0=8502; 1=85816)
                0   Processor (0=Z80; 1=8502])
IO:D506 MMURCR  RAM configuration register
                7-6 VIC RAM Bank (0-3)
                5-4 MMU v1 ExRAM (0=Pages 0-3; 1=Pages 4-7; 2=Pages 8-11; 3=Pages 12-15)
                3-2 RAM share status (0=None; 1=Top; 2=Bottom; 3=Both)
                1-0 RAM share amount (0=1k; 1=4k; 2=8k; 3=16k)
IO:D507 MMUP0L  Zero page pointer low (nn = xxnn00-xxnnFF)  
IO:D508 MMUP0H  Zero page pointer high (nn = nnxx00-nnxxFF) 
IO:D509 MMUP1L  Stack page pointer low (nn = xxnn00-xxnnFF)
IO:D50A MMUP1H  Stack page pointer high (nn = nnxx00-nnxxFF)
IO:D50B MMUVER  MMU Bank and version #
                7-4 Banks nnnn = 2^(nnnn) banks (1=128k; 2=256k; 4=1MB; 9=16MB; 15=2GB)
                3-0 MMU Version (0=Stock; 1=ExRAM available (1mb); 
                    2=Page2/3 16MB paging available)
IO:D50C MMUPG2  RAM bank at MMUv2 bank 2 (256 banks * 64k = 16MB)
IO:D50D MMUPG3  RAM bank at MMUv2 bank 3 (256 banks * 64k = 16MB)

[Alynna]

So the good news is I finally found out what was constraining the address bus and now this C128 officially has a 24 bit address bus, end to end.
The bad news is while running my RAM size test I hit something in the core on RAM bank 146, and it froze the test.
So for now, I will have to constrain the RAM to 8mb (128 pages) until I can really get with Erik and find out what is in the first 16mb of SDRAM.
But hey, its about the same amount of RAM as the Mega65 has, right?

[Alynna]

C128-8ma.png (1.29 MiB) Viewed 12725 times

c128-8mb.png (397.41 KiB) Viewed 12725 times

C128_220614.rbf

(3.89 MiB) Downloaded 340 times

[Alynna]

I am going to be timing out on enhancements and be looking into the 1571 disk drive next. The 1541 and 1571 are.. awfully similar... And the fact is, testing out CP/M (which still works despite all the new MMU goodness) made me sad with its speed.

[ericgus09]

Alynna this is great stuff, thank you for your work and contributions ..

[eriks5]

Anlynna, since most of your changes are not related to any real C128 hardware or addons, could you name your core differently and move your discussion of it to another thread.

In my opinion, a MiSTer core should reflect the hardware and add-ons as they actually exist. Any other changes or improvements - however interesting - result in a core that deviates from the original hardware and is therefore by definition incompatible. It should be clearly identifiable as such.

[chrisy]

ignore

[eriks5]

Just pushed a new release of the C128 core to my GitHub repo.

Notable changes are:

• Z80 is now cycle-correct and the Z80 mode memory layout is fixed. CP/M should work
• All C128 extra keys implemented. See the keyboard section in the README for the layout
• Couple of small fixes to VDC

This is still a work in progress. The README in the repository documents known issues.

[AmintaMister]

Just pushed a new release of the C128 core to my GitHub repo.

Notable changes are:

• Z80 is now cycle-correct and the Z80 mode memory layout is fixed. CP/M should work
• All C128 extra keys implemented. See the keyboard section in the README for the layout
• Couple of small fixes to VDC

This is still a work in progress. The README in the repository documents known issues.

THANKS!

[EeDee]

Thanks for working on this core

[eriks5]

Quick update on the progress of the C128 core.

I have Fast serial, the 1571 and it's little brother the 1570 mostly working. It works perfectly for D71 images and GCR encoded G71 images. Right now, CP/M just hangs when booting with the 1571 because it needs to access the WD1770 MFM chip which is not yet supported by the core. Unfortunately, I can't use the fd1772.v implementation the 1581 uses because of the way the chip is connected in the 1571. In the 1581 the WD1770 has full control of the drive, but in the 1571 it just gets a bitstream from the drive heads and has to do MFM decoding of that, so in the 1571 GCR and MFM decoding runs in parallel on the same bitstream, GCR decoding is done by the CPU, and MFM decoding is done by the WD1770. For a proper implementation the core needs to do the same.

To implement that I need some MFM encoded G71 images for CP/M to test with. But I can't seem to find any online. Anyone have, or know where to find, G71 MFM encoded images? The CP/M boot disks from zimmers.net or other download sites are not MFM, but actually all in GCR format. D71 is always GCR. It has to be a G71 image, and these can be GCR or MFM (or even a mix)

Edit: a G64 with MFM tracks would be great too. Difference with G71 is that G64 is for single sided disks, G71 for double sided. But I actually found some double sided G64 images online, so core treats G64 and G71 as the same and looks at the number of tracks in the file

[segamemister]

I found two images that are g71 not sure if they be any help though

https://sourceforge.net/p/vice-emu/bugs ... -35trk.g71 --- Tooken from https://sourceforge.net/p/vice-emu/bugs/1564/

Also there a zipped g71 on internet archive here.

https://archive.org/download/UnRenamedF ... ore8BitsII

PS. Seen your post further down well done and good luck

[eriks5]

I found two images that are g71 not sure if they be any help though

Thanks, but both are GCR format unfortunately

If we can't find any images, I'm going to consider this to not be a priority for the core. Just fix CP/M hanging on the absence of the WD1770 by adding a dummy implementation of it and call it "good for now"

[eriks5]

Update: I managed to format a G71 disk in MFM/KayProIV format using the Z64k emulator and it works in that emulator \o/

Now, we just have to hope that that emulator does it right. But at the minimum the core will be compatible with that emulator

[EeDee]

Thought I'd send this link, despite your progress, though doubtful it will help much

https://atariage.com/forums/topic/29992 ... -boot-cpm/

[eriks5]

Thought I'd send this link, despite your progress, though doubtful it will help much

https://atariage.com/forums/topic/29992 ... -boot-cpm/

That's indeed all about standard CP/M boot disks, those are in GCR format. The 1571 can read disks from *other* CP/M systems of the time like Osborne and KayPro, and even 360k MS-DOS disks as that's also MFM. Commodore instead released all their CP/M disks in GCR format so that the good ol' 1541 could also read them. It's not a big deal, but I'm a bit of a perfectionist and I just want to have this working too

Ultimately it would be awesome if we could just mount images in native format from those systems. But I think internally I'll need to convert them to G71 on the fly, just like D71 is converted to G71 on the fly now. So having G71 fully working is the key here as that is what the core would have to be able to read at the minimum.

[EeDee]

...It's not a big deal, but I'm a bit of a perfectionist and I just want to have this working too

I can sympathise with that

[eriks5]

New development/test release of the C128 core is here!

This version contains support for the 1570 and 1571 disk drives and fast serial with the 1570, 1571 and 1581. No more slooooooow loading speeds in C128 mode. MFM support is unfortunately not done yet, so MFM (Kaypro, Osborne, etc.) formatted disks cannot be used in the 1571 yet, but dual sided GCR encoded disks (i.e. normal Commodore format) are fully supported.

In order to support dual sided disks (and MFM later) the main MiSTer (ARM side) binary had to be updated as well, as most en/decoding is done on the ARM side.

The attached zip contains 2 binaries: The C128_20220805.rbf should be placed in the _Computer directory on the MiSTer SD card, and the MiSTer binary should be placed in the root of the SD card, replacing the existing file after you backed that up. Without the accompanying MiSTer file, the disk drives will not work in the core. At all.

Also in the zip are two empty dual sided disk images to play with. The Empty.g71 image should be formatted before use (it comes without any tracks, so later it's possible to use this empty disk image to create MFM formatted disk images). The Empty.d71 image is already formatted.

Please test out this core and I would appreciate it if disk I/O with the C64, C16 and VIC20 cores also gets tested with the provided MiSTer binary, as these cores use the same ARM side code for disk access. I did my best to keep everything backwards compatible, but it's a lot of code with complex dependencies.

The code for the core is in this branch: https://github.com/eriks5/C128_MiSTer/tree/iec (I'll merge to master once MFM is done).
The code for the modified MiSTer binary is here: https://github.com/eriks5/Main_MiSTer/tree/c128-d71

Although I have tested the disk I/O routines extensively, it is possible that there is a bug in the new MiSTer binary that corrupts disk images. MAKE BACKUPS OF YOUR DISK IMAGES (d64/d71/g64/g71) BEFORE USING THEM WITH THIS VERSION

[akeley]

I've tried to load (but not save) several native C128 games from disks, both d64 & d71 - they seem to work fine. Ditto loading on C64/VIC/C16 cores.

[eriks5]

Quick update on the status of the C128 core. I have aimed at getting a new preview out once a month, that's not happening this time unfortunately as there has not been enough progress.

I've been working on getting the 1571 to read MFM disk images for use with CP/M. The core successfully read a file from an MFM formatted .g71 image for the first time yesterday, so that now works. Some MFM disk formats make CP/M hang, but the emulator I used to create these images hangs on them too. Need to look deeper into this.

Next thing to do is writing MFM disks, which should make it possible to do a full test of the MFM subsystem by formatting a new disk image, writing to it and reading it back in the core, emulators, and maybe even a real C128.

Another thing being looked into is getting fast serial working with external drives using an IEC user port adapter for the MiSTer, there are some timing issues there.

[EeDee]

Thanks, appreciate the update

[Flandango]

Another thing being looked into is getting fast serial working with external drives using an IEC user port adapter for the MiSTer, there are some timing issues there.

If you are using the stock IEC user port adapter as specified in C64 docs, and I am not mistaken, it does not connect PIN 1 of the IEC port (Serial Service Request) and I believe that is needed for fast serial.
If what you are working with does, then please disregard.

[eriks5]

If you are using the stock IEC user port adapter as specified in C64 docs, and I am not mistaken, it does not connect PIN 1 of the IEC port (Serial Service Request) and I believe that is needed for fast serial.
If what you are working with does, then please disregard.

I don't have the hardware myself (yet), someone else is testing this. When SRQ is connected, it either just hangs the protocol, or there's data corruption. The behaviour depends on changes that should not be related, for example it behaves differently with 16k of VDC RAM instead of the normal 64k.

If you're interested in the details, there's an open issue on my github.

[djsquare]

Hey I just want to say I've been having fun playing with this core and thank you eriks5 for all your hard work. Now I wonder what else I can do in 80 column mode...

[rhester72]

Hey I just want to say I've been having fun playing with this core and thank you eriks5 for all your hard work. Now I wonder what else I can do in 80 column mode...

Productivity (including GEOS and CP/M) and Infocom games. LOL

Though I will confess that if he hooks it up to serial the way the C64 is on MiSTer so you can "dial out" to BBSes over telnet, seeing DESterm 128 actually do something again 30 years later would be AWESOME!

[akeley]

C64 OS has just been released: https://c64os.com/ One of the "recommended" setups is C128, wonder if it would work on this core (baring the fact it's somewhat costly, especially seeing as there is no digital download option).

[thera34]

C64 OS has just been released: https://c64os.com/ One of the "recommended" setups is C128, wonder if it would work on this core (baring the fact it's somewhat costly, especially seeing as there is no digital download option).

According to the site, we would need a SD2IEC drive to begin with. Maybe it would work with an SNAC2IEC adapter like this https://ultimatemister.com/product/mister-snac-iec-c64/ and an SD2IEC drive connected, but I have neither of those to test out.

Minimum Hardware Requirements
A Commodore 64 computer
A Joystick
An SD2IEC drive* **