The “Cycle Accurate” Conundrum and Is There a List of Cores That Are?

[Bristles]

Emulation has had overclocking for years.
And as for enhancing, emulation has always enhanced the original, from 1080p/2k/4k upscaling, better textures, PGXP (Parallel/Precision Geometry Transform Pipeline) for the PS1, save/load states in every emulator, run-ahead support, recording features, multiplayer - where it never existed, VR support in the NES emulator 3DSen VR, EmuVR - Virtual Emulation - where you can play many emulators in a Virtual 80s style room - can't do that in FPGA.

[limi]

The importance of this can't be understated.

Hello, and welcome to my pet peeve that I am single-handedly correcting one forum post and YouTube/Twitter comment at a time

This is super common, but the term is “cannot be overstated” — since you intend to say that one cannot put a high enough importance on it. “Cannot be understated” would mean that it would be hard to make it sound unimportant enough.

It’s not too late! We can hopefully still save this phrase on the internet, unlike “literally”, which now also means “figuratively” — join me on this quest!

PS: I hope you take this in the spirit it is meant, playfully!

[Armakuni]

@rsn8887 points well taken and agreed, to a degree. PSX, for example, still experiences limited issues related to the FPGA switching just not being able to keep up with reality, causing interesting artifacts like failed replays in Gran Turismo. Those are edge cases, for sure, but really no different than processing power limits on the RPi 3 (for example) causing other minor breakage on a small subset of games.

The point I'm driving at here is that, due to gate switching delay, it's actually more or less the same issue on traditional CPUs and software and FPGA, just manifested differently. (The same can and does happen, for example, with RAM latency...and that's the whole reason for the dual RAM stick shenanigans.)

Robert stated the PS1 core could not be 100% early into development due to the way he shares the DDR, If you look on Github its mostly 90% complete but it is timing accurate though

[dmckean]

The PSX core could be more accurate by implementing the CD hardware faithfully and improving the timings on future FPGA hardware that doesn't have the same limitations as the DE-10 Nano. That's sure to happen at some point in the future, it should be remembered how young the PSX core is at this point when comparing it to PC emulators.

[Armakuni]

The PSX core could be more accurate by implementing the CD hardware faithfully and improving the timings on future FPGA hardware that doesn't have the same limitations as the DE-10 Nano. That's sure to happen at some point in the future, it should be remembered how young the PSX core is at this point when comparing it to PC emulators.

The core in its current state is timing accurate and passes all tests

[rhester72]

The core in its current state is timing accurate and passes all tests

Definitely not. A quick run in GT1 Arcade mode will readily demonstrate that.

Setting Turbo to Medium resolves it as a workaround, but per the developer it can never be made "timing accurate" due to DE-10 performance characteristics.

[Armakuni]

The core in its current state is timing accurate and passes all tests

Definitely not. A quick run in GT1 Arcade mode will readily demonstrate that.

Setting Turbo to Medium resolves it as a workaround, but per the developer it can never be made "timing accurate" due to DE-10 performance characteristics.

I would take it up with Robert then as he posted the test results on Twitter etc. Showing his core passes everything

The core is timing accurate and passes all the known tests

[rhester72]

sigh

https://github.com/MiSTer-devel/PSX_MiSTer/issues/199

[Armakuni]

sigh

https://github.com/MiSTer-devel/PSX_MiSTer/issues/199

You will find nearly all the cores have edge case issues

The C64 core still has minor VIC-II issues and Minimig still has issues and these cores are about 20 years old in origin

I take it you didn't bother to look up the Tweets where Robert showed the core passing all 101 CPU timing tests for example ?

Sigh

[rhester72]

I'm going to step back from the obvious gaslighting.

[dshadoff]

I posted early in the thread about the definition of "cycle accurate" not meaning what most people think it does.
Just to reiterate...

As one digs deeper into compatibility, one finds that "cycle accurate" is measuring really only one set of variables related to compatibility.
There are edge cases related to register initialization values, and interactions between any two components inside the machine - which means that more components means exponentially larger numbers of edge cases.

In short, if you are looking for an "identical match to hardware", you won't find one on FPGA, nor will you on software. Heck, on many systems, you won't even find uniformity between hardware revisions. On most systems, the sum total of what is known about each component is not complete enough to even create a provably-complete set of tests for all of this (although subsets do exist for some machines).

Perhaps the goal that people should be seeking is how many known compatibility issues there are with software released on the system, or whether the core is "more compatible" than any other software or hardware implementation available. For example, the PC Engine (TurboGrafx) core is the best implementation of the system, with a vanishingly-small number of issues, of which almost none affect any commercial game.

[rhester72]

@Armakuni I'm starting to hate this topic, but I realized afterwards that you didn't see the word from 'the man himself' about the reason for the GT issues.

Thus, here we go...

viewtopic.php?p=73866

Whether the internal cycle counter is correct or not, in the real world, the execution is (admittedly) imperfect due to DE-10 Nano constraints and will never be 100% correct...and that's what leads to the GT replay issue (among a few others). It's not a "flaw" in the implementation, it's doing the best it can with what it has to work with.

There seems to have been a massive spate lately of people somehow 'needing' FPGA emulation to be 'perfect' as a function of their own sense of self-worth or something...I don't understand it, but I apologize for lumping you in with that (thankfully small) group.

[rsn8887]

Note that “the man” didn’t say that it will never be correct. He said “100% accuracy, which is very likely never going to happen with a system so complex.”

I agree though that probably nothing will ever be 100% absolutely perfect. It doesn’t have to be to enjoy playing almost all games accurately. As was mentioned here before, even original hardware was not “perfect.” There were variations between batches of chips and revisions of motherboards.

Certain aspects, such as input lag, however, can be optimized greatly on FPGA, without any compromise, which is awesome IMO. Also, this is accomplished with a resource usage that is really low, only 5V*2A = 10 Watts max, probably much less during actual gameplay. I compare that to my Steamdeck which struggles to run even bsnes in accuracy mode with max swapchain=2. And that’s just only SNES, not even speaking of PS1. I just tried emulating an accurate N64 on my Steamdeck with Parallel RDP and even with max swapchain=3 I get stuttering sound in the first level. On MiSTer it runs smooth on a fraction of the power. If you use a big desktop PC or gaming Laptop, the emulators will probably run near perfect, but you are also using hundreds of Watts and have three or more giant fans blowing.

It seems FPGA hardware just happens to be almost perfectly suited for running old games. And, as an additional benefit, one could probably use the Verilog or VHDL hardware designs to actually fabricate new ASIC chips in principle in the future to truly resurrect the old machines.

Nobody needs FPGA to be perfect, but it is the most exciting development to happen in the retro world, IMO. The task is to emulate old digital hardware, so it makes sense to me to do this using hardware description languages like Verilog or VHDL. They lent themselves naturally to the task, instead of going a roundabout way using regular software languages like C or ASM. According to universal Turing machines, in theory, it is irrelevant how the task is accomplished, but practically, in terms of performance and implementation, there’s a huge difference between approaches.

[Syntax Error]

I also thought up the silly notion that what i have here is a thing that allows me to get into electronics and breadboarding without the need to spend my meagre funds on components, expensive soldering kits and leftover throwaway garbage, 6502 and other chips and can just try to create virtual ghosts inthere (once i wrap my head around it a little better) so i can do "HEY look at the blinking led !" and feel like a hi schooler

Au contraire! That is not a silly notion, the DE-10 is very literally a development board designed to teach FPGA to newcomers. So you digging into FPGA development, even to make a single LED blink, is fulfilling the very purpose of the board existence!

I'm sure the ST core is solid enough for development, although even back in the day it was common to develop in a more powerful machine. Of course the core can still be a good check to estimate if something will work on real hardware

The ST gets a bad rep from Amiga lovers but there are some unique games on it (I personally like Sundog); wish you the best of luck to make some cool new stuff for it! (we are getting off topic, maybe best to go to am
n ST thread)

The tribalism "on the scene" is a known phenomenon to me but i dont really go with that. Its more like i dont have enough hands and heads to go at all of it from the c64 and spec to the st/falcon and amiga(s) (i wonder what "amiga" stands for really since it refers to at least 6 machines i can think of) people and their tribes you know.
As for the dev and running, i had a demo recently named dotusti vitsei ( https://www.pouet.net/prod.php?which=94831 ) which, if i ran it on the pc (which holds an i5, rtx 3070 and 32 gb ddr4 + ssd for the OS and most games) using hatari actually lagged while on the little soapbarbox-sized mister it runs flawlessly , even if normally the hardware in the pc should handle it dozens of times at once (why that is is probably above my head, i can only see what i observed) to me , out of nostalgia id prefer "doing it" on the st itself, not the same for a c64 since thats torture once you're used to programming on a big screen. Its the reason why i got one in the first place : minimig and the ST, the feeling that im on " a real computer " somehow feels better , hard to explain and ive been looking into verilog but i think i have a lot of reading to do and not sure which one since there seem to be more than one (as usual) and the thing is, even if its the same "von neumann" logic (condition / statement / iteration / jump / ....) creating an actual machine instead of the software to run on one seems a lot more daunting.

I can only hope this what looks like a pretty large community keeps coming, i still hope to see a fully working jaguar and especially the obscure Falcon , but actually very curious towards custom machines that actually never existed using template chips and boards in software or even brandnew architectures

thanks for all the answers here. Might take me a while but i do keep checking. Im gonna have a lot more questions before 2050 kills the world i think

[pgimeno]

It’s not too late! We can hopefully still save this phrase on the internet, unlike “literally”, which now also means “figuratively” — join me on this quest!

PS: I hope you take this in the spirit it is meant, playfully!

<troll>I could care less.</troll>

[FPGAzumSpass]

The core in its current state is timing accurate and passes all tests

Definitely not. A quick run in GT1 Arcade mode will readily demonstrate that.

Setting Turbo to Medium resolves it as a workaround, but per the developer it can never be made "timing accurate" due to DE-10 performance characteristics.

Exact. PSX cannot fulfill all timings 100% accurate, due to the DDR3. This is mostly GPU timing, SPU to some extend.
CD timing is not fully accurate due to the original CD controller not being used and the CD seek timing model being some approximation.
Also i couldn't figure out all CPU timing edge cases to full accuracy, so there is also some "information missing" inaccuracy.
I have no issues with being completly transparent there. Some of these are my fault(effort, motivation, skills), some are due to the hardware.

For most older computers and consoles, the skill and information is typically the only reason if they are not fully accurate yet on FPGA.
With newer consoles, there are hardware limitations.

Should we work on them at all when 100% cannot be reached? My opinion is: of course we should.

First reason: The inaccuracy due to missing information gets higher and higher the more complex a system is.
How can this be solved? By more people working on it!

Second reason: When new hardware is available, there is already a design available that only needs to be adjusted.

Third reason: you can still use them perfectly fine for almost all typical use cases(games) and have fun. Isn't that great?

[rhester72]

@FPGAzumSpass Please don't misconstrue what I was attempting to communicate - your work has been absolutely amazing and invaluable and the community honestly can't thank you enough for it. We just seemed to get a sudden higher-than-normal spate of "ZOMGBBQ FPGA implementations are perfect and warm my cockles" folks spreading pretty rough disinformation that it's important to clear up, lest we get another person show up claiming how they got "ripped off for $800" because of "false advertising".

Nothing is ever 'perfect'...but it's hella fun! Thank you again for all you've done!

[FPGAzumSpass]

No worries
There is no reason to hide the shortcomings that exist. Maybe if you want to sell a product?

It should be obvious when looking at the github issue lists or active commits to all kind of cores that most are not 100% perfect.
But just because it's not 100% doesn't mean it cannot be very good.

In the end we have a small device that does all kind of retro systems with low power, low latency, native or analog interfaces and 99%(or pick any number that fits) accuracy and you get the development basically for free.
For me that sounds amazing. But if it's not good enough for some that is totally fine.

[rhester72]

I personally blame Analogue. The "FPGA, so it's hardware - and thus perfect!" claims seemed to start with their advertising and the misinformation basically flowed from there. shrugs

Of course, anyone who actually owns an Analogue product knows what complete and utter bullshit those claims are/were... laughs