Is the Atari Falcon 030 possible in MiSTer?

[dmckean]

1.2 million transistors is roughly what the i486 uses and this CPU fits so comfortably into the MiSTer FPGA that there is also room for both Soundblaster and SVGA. The 273000 transistors of the 68030 are no indicator that the core can't fit into the MiSTer. They are roughly the same as the combined 68000 and 68020 transistor count and both chips are implemented into Minimig at the same time.

Sorry, but this is just false. The ao486 implementation on the MiSTer is a hack and is based on the Bochs software x86 implementation. It achieves speed through liberal use of cache but many games and software have horrible compatibility issues. A true i486 implementation wouldn't even come close to fitting on the MiSTer.

[daschewie]

I don't think size is such a problem. The whole Amiga core uses about 1/3 of the MiSTer fpga and it comes with 68000 and 68020 support and AGA graphics. So a Falcon shouldn't take up 3 times of this.

Back in the 90's Moore's Law was truly in effect. So transistor counts were going up exponentially.

An interesting piece of trivia: The original Motorola 68000 was named after its transistor count (68,000).
Unfortunately the 68030 has a transistor count of 273,000, making it 4 times larger than the 68000.
The 68040 has 1,200,000 transistors making it 17 times larger and so on.

https://www.wikiwand.com/en/Transistor_count

1.2 million transistors is roughly what the i486 uses and this CPU fits so comfortably into the MiSTer FPGA that there is also room for both Soundblaster and SVGA. The 273000 transistors of the 68030 are no indicator that the core can't fit into the MiSTer. They are roughly the same as the combined 68000 and 68020 transistor count and both chips are implemented into Minimig at the same time.

I did not say it could not be implemented on Mister, I just mentioned that the complexity is more than 3 times as much as the 68000. There are two ways to create things, either making an exact replica of the circuits (i.e. decapping and tracing), or mimicking observed behavior (i.e. probing data lines). The ao486 core mimics behavior and is not 100% compatible.

[Souldream]

Perhaps people lost ... but DSP56K source VHDL exist

https://github.com/Torlus/firebee-fpga/tree/master/DSP

[Chris23235]

1.2 million transistors is roughly what the i486 uses and this CPU fits so comfortably into the MiSTer FPGA that there is also room for both Soundblaster and SVGA. The 273000 transistors of the 68030 are no indicator that the core can't fit into the MiSTer. They are roughly the same as the combined 68000 and 68020 transistor count and both chips are implemented into Minimig at the same time.

Sorry, but this is just false. The ao486 implementation on the MiSTer is a hack and is based on the Bochs software x86 implementation. It achieves speed through liberal use of cache but many games and software have horrible compatibility issues. A true i486 implementation wouldn't even come close to fitting on the MiSTer.

Sorry, but this is just false, there aren't "horrible compability issues" with the core, but very mild compability issues and they are not necessary rooted in the CPU as a DOS machine is a complex system with various components that could be incompatible to another (just like it was in the old DOS days). The fact that the implementation is based on Bochs doesn't mean that it is less complex then a real 486. You can be sure if the engineers at Intel were able to reduce the number of transistors by quite a margin they would have done it back then. ao486 features everything a 486SX features plus additional caches.
Again the combined transistor count of the 68000 and 68020 is already about 20% of the i486 transistor count
and both live happily within the minimig core together with the ECS and AGA chipset and the rest of the Amiga hardware. The complete core utilises about 35% of the MiSTer.

[dmckean]

I'd call hundreds (maybe thousands?) of games and applications not being compatible pretty horrible. It's a really cool technical achievement to have a core like ao486 at all on the DE-10 Nano, but it has tons of issues.

[Televicious]

TT is feasible. That was actually one if the the goals for the original MiST, but Someone needs to make a 68030. I thought someone was working on that for minimig. Hopefully there's enough room for fpu.

[robng15]

On a side issue, I have written an FPU core in Silice, a higher-level development language, that can handle double, single and half-precision floating point numbers, not the 80-bit floating point numbers, extended-precision I believe. It easily fits into a ULX3S, mainly due to skipping some rounding modes.

As it is for a RISC-V CPU, it doesn't support sin/cos/tan and other compound operations, they'd need to be implemented by running the algorithms through the units it does have, which are int<->float, precision change, comparisons < and =, sign manipulation, classification, add/sub, mul, div, sqrt and fused-multiply-add.

As it is in Silice it looks very C-like, which may help someone translate it into a hardware description language suitable for MiSTer. For what it is worth, it moves floating-point numbers into double-precision bitfields for operations, for the 68881/68882 it'd need to move floating-point numbers into extend-precision bitfields.

I do not know how feasible this would be, especially implementing the non-core floating-point operations that would be required, and no idea if it'd fit, but someone may want to give it a go.

[cursedverses]

I don't think size is such a problem. The whole Amiga core uses about 1/3 of the MiSTer fpga and it comes with 68000 and 68020 support and AGA graphics. So a Falcon shouldn't take up 3 times of this.

Back in the 90's Moore's Law was truly in effect. So transistor counts were going up exponentially.

An interesting piece of trivia: The original Motorola 68000 was named after its transistor count (68,000).
Unfortunately the 68030 has a transistor count of 273,000, making it 4 times larger than the 68000.
The 68040 has 1,200,000 transistors making it 17 times larger and so on.

https://www.wikiwand.com/en/Transistor_count

1.2 million transistors is roughly what the i486 uses and this CPU fits so comfortably into the MiSTer FPGA that there is also room for both Soundblaster and SVGA. The 273000 transistors of the 68030 are no indicator that the core can't fit into the MiSTer. They are roughly the same as the combined 68000 and 68020 transistor count and both chips are implemented into Minimig at the same time.

My understanding is the 486 in the ao486 core is not an accurate representation of a 486, though works as such. A case of "if it looks like a duck and acts like a duck" as such.

[Chris23235]

Back in the 90's Moore's Law was truly in effect. So transistor counts were going up exponentially.

An interesting piece of trivia: The original Motorola 68000 was named after its transistor count (68,000).
Unfortunately the 68030 has a transistor count of 273,000, making it 4 times larger than the 68000.
The 68040 has 1,200,000 transistors making it 17 times larger and so on.

https://www.wikiwand.com/en/Transistor_count

1.2 million transistors is roughly what the i486 uses and this CPU fits so comfortably into the MiSTer FPGA that there is also room for both Soundblaster and SVGA. The 273000 transistors of the 68030 are no indicator that the core can't fit into the MiSTer. They are roughly the same as the combined 68000 and 68020 transistor count and both chips are implemented into Minimig at the same time.

My understanding is the 486 in the ao486 core is not an accurate representation of a 486, though works as such. A case of "if it looks like a duck and acts like a duck" as such.

Back in the day, when the Intel 80486 was sold there were several companies selling their own 80486 CPUs (AMD, Cyrix, UMC). All these manufacturers had built their own version of the Intel CPU and non of them was identical to the silicon Intel produced at the time. Many programs relied specifically on the Intel 486 CPU and were not 100% compatible when run on other CPUs. This was common back in the day because at this time at least in Europe a huge number of pre built PCs was sold at prices so low that even people never considered to buy a PC bought one and these PCs most of the time didn't came with the more expensive Intel CPUs.

The different 486 CPUs performed very different from each other, even when they were clocked identical, even different in the various benchmarks. Back in the 1990s there never was "the" 486 as long as you didn't talk specifically about the Intel 80486.
There were always multiple incarnations of this architecture in use and just like the AMD, Cyrix and UMC versions the MiSTer 486 core is just another incarnation of the architecture. In some regards it is much faster then the Intel 80486 and in other regards the CPU runs slower in the ao486 core that is based on the Bochs x86 software implementation.

[niallquinn]

Anything ever happen with this? I mean I've 2492 demos alone for it. Every one. Make a cracking VHD!

Thanks.

[Newsdee]

The 273000 transistors of the 68030 are no indicator that the core can't fit into the MiSTer.

The design on FPGA may differ from the actual chip. What matters is whether it is accurate in timings for the outside world, which FPGA is better suited for compared to "CPU-based" emulation. It would still have to go through rigorous testing to prove it behaves the same as the original chip, though.

And to be fair on modern FPGA cores, often that level of testing is not even a concern if most games run fine

[rhester72]

The design on FPGA may differ from the actual chip. What matters is whether it is accurate in timings for the outside world, which FPGA is better suited for compared to "CPU-based" emulation. It would still have to go through rigorous testing to prove it behaves the same as the original chip, though.

Given not even the official Motorola documentation gives accurate instruction timings for instructions on the '020 and above due to the myriad of states the logic could be in at any given time, there's never been any such things as a "cycle-accurate" 68020/030/040/060 simulation and there never will be.

[bazza_12]

fight fight fight

[rhester72]

fight fight fight

Not at all. I just prefer to set people's expectations reasonably versus the fantasy wishing that predominates on the forum. Wanting something REALLY bad won't bring it into being.

[Newsdee]

Given not even the official Motorola documentation gives accurate instruction timings for instructions on the '020 and above due to the myriad of states the logic could be in at any given time, there's never been any such things as a "cycle-accurate" 68020/030/040/060 simulation and there never will be.

Fair. I think at this stage many people would be OK with a partial implementation as long as most applications run. I don't see it happening any time soon, though... computer cores are nowhere as popular as consoles for FPGA gaming.