DE25-Standard Terasic Inc Press release

[dshadoff]

Faster cores such as the AO486, might be nice, but we're unlikely to get to a Pentium 1 P60, or are we???

The ao486 core is apparently very hard to work with, because of the way it’s written (I hear). To become a Pentium-like machine, it would basically require a rewrite because of all the differences between the 486 and the Pentium, including notably the dual (U and V) pipelines, significantly smaller cycle counts on many instructions, and math coprocessor.

It’s really hard to say because it would need such a deep and thorough rewrite, and because the characteristics pf the new FPGA are still not well known, but I’d say don’t hold your breath.

[german_user]

If i read the specs right there is no big difference in the size of BRam. The clockrates that would be possible is the big question.

[Bas]

You're not going to get anything Pentium compatible without FPU. Tighter clocks may end up with a very fast 486SX-ish-workalike at best for AO486 in its current functional state. If any of this were up to me (which it's not), I'd prefer effort be spent on getting AO486 more compatible rather than faster. Add something like a period-appropriate simulated IDE controller to it or, heck, an Adaptec 1542 SCSI controller would be fun if we had the space fore it. That, plus an FPU, would open more operating systems to the core and increase compatibility for software that bangs the hardware directly outside BIOS control. I'm saying this as someone who ran OS/2 and Windows NT as daily drivers back in the day.. a more workstation-class 486 would be totally awesome to me, but I realize I'm something of a niche geek here.

All in all, I'm not really holding my breath for anything revolutionary with Intel being in the situation it's in right now in the market. They're not exactly in any position to be throwing people like us any bones.

[dshadoff]

If i read the specs right there is no big difference in the size of BRam. The clockrates that would be possible is the big question.

OK, let me walk you through this. First, I should clarify - when I said "BRAM", I was talking about all forms of embedded memory inside the FPGA.
This is not about board specifications; it's about FPGA chip specifications - for that, we need to look at the specific chips being used:

DE10-Nano: chip 5CSEBA6U23I7
On the product page ( https://www.intel.com/content/www/us/en ... ducts.html ), look at row "Cyclone V 5CSEA6 FPGA".

DE25-Standard: chip A5ED013BB32AE4S (when available)
On the product page ( https://www.intel.com/content/www/us/en ... eries.html ), look at the rows corresponding to "A5E 013B".

You will see that there are various measures which aren't exactly apples-for-apples comparisons, because these are well over 10 years apart in age.
But, for example:

Logic Elements (LE):
DE10 = 110000
DE25 = 138,060 (25% more than DE10) -> but there are ALSO 46,800 "Adaptive Logic Modules" (whatever that may imply - perhaps they are even more flexible than LEs)
-> Since an entire 486-class PC plus VGA scaler can fit in 110K LEs, an additional 25% is actually quite a big jump.
Adaptive Logic Modules would most likely improve this considerably, but I'm not yet familiar with them.

DSPs:
DE10 = 112
DE25 = 376 (more than triple DE10)
-> DSPs are currently used primarily for sound and video filters; additional uses would be possible with additional resources.

Maximum Embedded Memory:
DE10: 6.191Mb (that's megabits, not megabytes) -> Includes both M10K and MLAB blocks
DE25: M20K = 6.99Mb + MLAB 1.43Mb = 8.42Mb (36% more than DE10)

I would say that embedded memory is a much more precious commodity than LEs, as they are so flexible and can be configured as so many different types of memories at high speeds, the fact that they are parallel-access to a massive degree, and that they are easy to use. Developers would prefer to use embedded memory over any other type for all these reasons, but have to go to external SDRAM or DDR3 for various things because embedded memory is a limited resource. When moving to external SDRAM or DDR3, a developer needs to take into account latency, bandwidth, access algorithms, and the fact that they are generally single-access into consideration - meaning that a lot of developer time is spent on figuring out which memories to use for which purposes and how to allocate limited bandwidth in order to prevent conflicting accesses and optimize their use.

A 36% increase in the amount of embedded memory available could "make or break" a lot of cores which are on the edge, and could simplify cores which otherwise would need to implement these complex access strategies.

[german_user]

True, but a big gamechanger would be 2 or 4 MB of BRAM. So the problems with Saturn core as a example could be solved. But it seems that we do not get such a amount anytime soon in the pricerange we need for retrogaming. So lets wait what "hyperram" could do in replay2...

[dshadoff]

Sounds like you're expecting some huge leap of progress based on that, and that you probably have one particular system in mind which is currently quite out-of-reach, rather than the multiple edge-case machines which are currently barely out of reach.

I don't want to destroy your dreams, but In general, development will start with simpler things first, and more complex ones will be started later, and take a longer amount of time.

The truth is, if somebody really wanted to implement such a distantly out-of-reach machine, they could still do it today. They could get the current 656K LE model of the DE25-Standard, and pay the additional cost. Byt the time they actually have built such a monstrous core (say, 5 to 10 years from now), the price of that FPGA may be down to your target price range.

According to the same product pages, the 656K LE version of the chip provides:

656,080 LEs + 222,400 Adaptive Logic Modules
31.46Mb of M20K embedded memory + 6.79Mb of MLAB embedded memory -> so you get over 4MB of embedded memory as you wish.
1,692 DSP mulitpliers

However, unless they've reworked the tools substantially, you could be waiting 8 hours for a large compile to complete on a top-of-the-line PC for such a device.

[german_user]

I would like to have a DC and Naomi Core and this seems unlikely with a DE25 nano. So if i spend once again money on a new FPGA board (have a DE10 and a mister pi) it should have the specs for it.

[MostroW]

i would be amazed if anyone or any team for that matter could pull off a DreamCast / PlayStation 2 core given that it would be even feasible on FPGA hardware in time, i for one can only wait and see.

[Bas]

Which cores are just barely our of reach?

[dshadoff]

Sure. Come back in 5 years and see how things are going at that time - whether any progress has been made toward that core, and whether any affordable system at that time would be capable of running it.

To be clear, I don't think anybody should be buying a system based on what they think it might be capable of in future UNLESS THEY ARE ACTUALLY THE DEVELOPERS WHO PLAN ON IMPLEMENTING IT.

Everybody else should wait until that core is complete - or at least in a state where they would be happy to help test it.

[dshadoff]

Which cores are just barely our of reach?

A bunch of next-generation arcade hardware (around 1992 - 1996), a few 5th-generation consoles, and updates to ao486.
Notable struggles would include Midway hardware (it shouldn't be too hard to find videos of Pram0d giving talks discussing the challenges), CPS3, and some Konami hardware which is still being decapped and reverse-engineered.

[Longtime4321]

FPGA recreations of the Konami arcade rhythm games would be dope. I hate playing rhythm games on emulator because even if they only have, say, 1ms of lag, i just feel like something's wrong. Anxiety, maybe.