MiSTer FPGA Forum

dshadoff wrote: ↑Sat Jul 18, 2020 10:08 pm Or one converter board (per machine) to do all of the above.

But nobody is selling that. I have no problem because I sell cheap adapters. But with official IO all related with native controllers is expensive and complicate. I think the solution is include level shifters on official IO

antoniovillena wrote: ↑Sat Jul 18, 2020 10:48 pm

dshadoff wrote: ↑Sat Jul 18, 2020 10:08 pm Or one converter board (per machine) to do all of the above.

But nobody is selling that. I have no problem because I sell cheap adapters. But with official IO all related with native controllers is expensive and complicate. I think the solution is include level shifters on official IO

Well, it's true that nobody is selling a whole set. But it doesn't need to be particularly expensive either.

I needed to do this for PC Engine in order to get proper support for mouse, memory base, 6-button, turbofire, etc., as PC Engine's timing is too fast for open-collector logic. Including bidirectional level-shift on the main board would not be sufficient; the output to the joypad (for PC Engine) needs to be driven, not open-collector.
https://github.com/dshadoff/MiSTer_PCE-SNAC

paulbnl wrote: ↑Sat Jul 18, 2020 3:43 pm
I got it from DB9 module https://github.com/Miguel-T80c/Genesis_ ... joydb9md.v.

This module is clocked at 50Mhz and it divides the clock by 256 for the joystick state counter which results in 195.3Khz (0.00512ms per state).

The joystick state counter counts from 0-255 and it saves the joystick buttons at state 0-6: 256 x 0.00512ms = 1.31ms.

You are right with the lag time. I have been working improving the instance to reduce the lag at maximum.
Here you have the instance in Verilog with the new code.

Now we read data in all 8 cycles (There is not a counter now until 256, we ready cycling the 8 states).We check it with 6 buttons and 3 buttons Megadrive Joysticks and it is very stable.
The clock we use for pin7 of the DB9 connector (SELECT pin) is based in the HSYNC signal. This value is the same than the real Megadrive machine. So, The lag is the same than real machine, that is means by definition that there is not lag.
So,let's study the lag in RGB mode when the HSYNC signal is 15 Khz and in VGA mode when the HSYNC is 31.5 Khz.

If we take 15 Khz (the worst case in RGB mode), this is the lag for each Joy Signal (the lag it is not the same for all signals of the Joy control as you can see in the Cycle Table) Consider that we are working in NTSC mode 60 Khz --> 16 ms for each frame. Our lag is not as USB lag that is variable, the lag in this case is constant and we read the Mode, X, Y and Z buttons every 0.534 ms, almost 32 times faster than the frame time. As we already knew, there is not lag

If we take 31.5 Khz as HSYNC the lag is exactly the half

We are gonna implement soon this new version in the DB9 cores to improve the lag. Thanks for your advice

Regards

Great news for DB9 users!

Thank you, Fernando and Antonio, for the specifics on the amazing DB9 fork and for improving it even further.