Re: MiSTer PCXT
Posted: Mon Jun 27, 2022 10:25 am
yes but the same
The online community for MiSTer FPGA enthusiasts
https://misterfpga.org/
Thank you very much.spark2k06 wrote: ↑Sun Jun 26, 2022 4:53 pm
I have created a preliminary testing branch before the next beta, this time I add the proposal of @kitune-san... you can add that you comment, I don't know exactly how was the change or if I have to add it from a previous pull request that I rejected you, please feel free to make pull request to this branch, I accept it and generate a release for users to test it:
https://github.com/spark2k06/PCXT_MiSTe ... e_beta_1_2
Edit: I think I've made the two missing changes, I'll give it a try.
Great. I don't know when I will be able to test it and accept the pull request, so if you don't mind, please also provide the corresponding RBF file so that users can test it as soon as possible.kitune-san wrote: ↑Mon Jun 27, 2022 1:07 pm Thank you very much.
I will send you a pull request regarding the keyboard (interrupt) after my confirmation.
I'm having the same issue with this last rbf. It happened to me with some of the older versions, and I don't really know what causes it in my case, it looks like random.kitune-san wrote: ↑Mon Jun 27, 2022 2:19 pm Apparently it happens when the room(device) temperature is low.
Temperature dependence is an indicator of a timing error in the FPGA. I suggest examining every instance where signals cross clock domains and also make an effort to completely constrain the design so you can achieve consistent results between synthesis passes and across devices.Apparently it happens when the room(device) temperature is low.
Mystery solved, you were using Sergey's default BIOS, instead of Juko ST. That BIOS was already known to have the keyboard problem, which kitune-san has now solved.breiztiger wrote: ↑Mon Jun 27, 2022 3:24 pm @kitune-san with you last version keyboard seem to work
but sometime when load core i have continues beep
Honestly, I am surprised at how many clocks this core has.MicroCoreLabs wrote: ↑Mon Jun 27, 2022 3:37 pmTemperature dependence is an indicator of a timing error in the FPGA. I suggest examining every instance where signals cross clock domains and also make an effort to completely constrain the design so you can achieve consistent results between synthesis passes and across devices.Apparently it happens when the room(device) temperature is low.
Sometimes it makes sense to eliminate clock domains to simplify the design. Rather than clocking some modules at 4.77 Mhz, it might be simpler to clock them at a more common/faster clock domain like 100 Mhz and just sample the 4.7Mhz as if it was just a signal. This is what I do with the MCL86. Having a single or few clock domains greatly simplifies the design.
One other thing to check is the supported clock speed of the PLL(s)... Sometimes there is a minimum that they support, so perhaps 14 Mhz is too slow.
Yes, it will be possible when it is stable and faultless 101 in this BIOS, but XTIDE will have to be placed in the E800 segment, in F000 it is not possible... therefore, with this BIOS we will have 16Kb less UMB memory. Juko ST is also a very good alternative at the moment, and XTIDE can be placed in F000 without any problem.breiztiger wrote: ↑Mon Jun 27, 2022 4:07 pm RAM failure…
But when it’s arrive just reload the core solve thé beep problem
Is there a way to have real 5160 bios with xt ide ?
The MCL86 BIU, for example, samples the 4.77 Mhz clock at 100Mhz as a regular signal. It is not treated as a clock. So a problem arises because you are routing 4.77 Mhz over the clock distribution network. So how does this signal get off of this network to be used as the input to a register?kitune-san wrote: ↑Mon Jun 27, 2022 4:00 pmHonestly, I am surprised at how many clocks this core has.MicroCoreLabs wrote: ↑Mon Jun 27, 2022 3:37 pmTemperature dependence is an indicator of a timing error in the FPGA. I suggest examining every instance where signals cross clock domains and also make an effort to completely constrain the design so you can achieve consistent results between synthesis passes and across devices.Apparently it happens when the room(device) temperature is low.
Sometimes it makes sense to eliminate clock domains to simplify the design. Rather than clocking some modules at 4.77 Mhz, it might be simpler to clock them at a more common/faster clock domain like 100 Mhz and just sample the 4.7Mhz as if it was just a signal. This is what I do with the MCL86. Having a single or few clock domains greatly simplifies the design.
One other thing to check is the supported clock speed of the PLL(s)... Sometimes there is a minimum that they support, so perhaps 14 Mhz is too slow.
When I saw your design, I certainly considered changing the design to use 100 MHz. However, I gave up because I did not have enough time to work on it and I could not change the design of other modules.
Then we have to constrain the timing. It will be difficult. But we have to do it...
Thank you. I solved it your way (mister.ini: vsync_adjust=0).Mills wrote: ↑Sun Jun 26, 2022 5:13 pmDid you try vsync_adjust=0 in mister.ini? It usually makes everything work (at least on lcd), at the cost of (maybe) choppy scrolls in any smooth scrolling game/program (very few for CGA). But for the moment It can be used to test. My lcd, connected using vga or dvi adapters, did not display the MDA graphics if vsync_adjust is not 0.suww37 wrote: ↑Sun Jun 26, 2022 4:52 pmEarly on, your PCXT cores (PCXT_20220507.rbf, PCXT_20220510.rbf, PCXT_20220512.rbf) displayed good screen output through the 15pin vga port of the io board. The recently updated core (PCXT_20220523.rbf ~ PCXT_20220626.rbf) is not able to output screen . If I connect the hdmi port of the d-nano board to my lcd monitor, it outputs normally. Therefore, I think that there is no problem with the supported resolution of my lcd monitor. The monitor on the left in the picture I uploaded is a crt monitor that only pushes 15khz. It is connected to the d-nano board. If I set direct_video=0, the screen doesn't support 31khz, so the screen shakes and looks weird. I think that the LCD monitor connected to the io board connected at the same time should come out normally. Your early cores ( PCXT_20220507.rbf, PCXT_20220510.rbf, PCXT_20220512.rbf) were displayed normally. I can't understand why your latest cores don't support normal screen output in io board.spark2k06 wrote: ↑Sun Jun 26, 2022 3:43 pm
I have put the configuration you show in MiSTer.ini and it works perfectly, both HDMI and VGA, look at the resolutions that the video module requires... maybe they are not compatible with your LCD monitor?
photo_2022-06-26_17-40-52.jpg
And once the splash screen is finished, in the BIOS:
photo_2022-06-26_17-45-08.jpg
Also this is still a beta, bugs will be common for the moment.
https://github.com/spark2k06/PCXT_MiSTe ... CONFIG.SYSNML32 wrote: ↑Mon Jun 27, 2022 9:43 pm Could someone share their Config.sys and Autoexec.bat settings they are using for the Lo-Tech 2Mb EMS?
I downloaded the drivers from https://www.lo-tech.co.uk/wiki/LTEMM.EXE
At the very least, the modules 8288, 8237, and ready signal, which control the bus, need to be redesign.MicroCoreLabs wrote: ↑Mon Jun 27, 2022 5:17 pm The MCL86 BIU, for example, samples the 4.77 Mhz clock at 100Mhz as a regular signal. It is not treated as a clock. So a problem arises because you are routing 4.77 Mhz over the clock distribution network. So how does this signal get off of this network to be used as the input to a register?
I don't think we are close to that yet and releasing something like that would be unfair for the developers who are actively working this publicly here. I feel like having access to something like that for those who can't dive into the os options and understand when something is a core bug and when something is "DOS being DOS" would cause too many false reports of stability.suww37 wrote: ↑Tue Jun 28, 2022 12:10 am I have very little computer knowledge so it's so hard to make hdd.img. If there is a pcxt games pack hdd.img file such as "MiSTer AO486 Top 300 DOS Games Pack" or a hdd.img file made by someone else, it would be appreciated if someone upload the file.
https://archive.org/details/top-300-final
At the end it was the industry support, and IBM had a huge commercial power in companies.Malor wrote: ↑Tue Jun 28, 2022 6:32 am Without any XT experience, learning what's up using 86Box would be a great idea. That emulator is very solid, so if you think you see a bug in the Mister core, make sure to verify the behavior against 86Box. If it fails both places, it's probably operator error.
FPGA emulation in general tends to be less polished, and a core that's still being developed is likely to be a minefield of gotchas. Combining that with new-user problems may be frustrating. Don't be afraid to fall back to 86Box and learn how things work there; being on virtual hardware that's quite close to correct will be easier while you figure things out.
As an aside, it still kind of amazes me that the PC won the computer war. The XT was such a pile of crap. Everything about the design was terrible. But it had three main strengths; it was an open architecture, it was built to a very high quality standard, and it had an *outstanding* keyboard. Combine that with the ability to field 640K, and you could get a heck of a lot of work done a heck of a lot more easily than on the true 8-bits.
But, man, the 68000 machines were so much better on a technical basis. Motorola really should not have lost that war.
flynnsbit wrote: ↑Tue Jun 28, 2022 1:26 amI don't think we are close to that yet and releasing something like that would be unfair for the developers who are actively working this publicly here. I feel like having access to something like that for those who can't dive into the os options and understand when something is a core bug and when something is "DOS being DOS" would cause too many false reports of stability.suww37 wrote: ↑Tue Jun 28, 2022 12:10 am I have very little computer knowledge so it's so hard to make hdd.img. If there is a pcxt games pack hdd.img file such as "MiSTer AO486 Top 300 DOS Games Pack" or a hdd.img file made by someone else, it would be appreciated if someone upload the file.
https://archive.org/details/top-300-final
I am putting effort into it though and trying to find the best combination of OS + Games + frontend (MyMenu).
I've built the following images:
IBM DOS 5
FreeDOS 1.3 (XT specific build from this video: https://www.youtube.com/watch?v=EOVLlMQs9f8)
MS DOS 6.22
Compaq DOS 3.31
(working on PC-DOS 2000)
There are issues with each above depending on what you are trying to accomplish. I would suggest downloading 86Box and then you can configure it very close to the core:
Machine type: 8080
Machine: [8088] Juko ST
Speed: whatever
Display: [ISA] CGA
Sound: [ISA] Adlib
HD Controller: [ISA] PC/XT XTIDE
FD Controller: Internal controller
Hard Disks: IDE mount a hdd.img
Floppy: mount any floppy img or install from Winworld
I've attached an example of my 86Box config for reference. Doing it this way, you can quickly install different os from floppy image and then just copy the hdd.img to your mister and test. This allows easy access to both the hdd.img and floppy drives to changing the images quickly.
Plug-and-play images will eventually come. It needs some love, and probably IDE support before the larger audience gets a hold of this. My opinion.