MiSTer FPGA Forum

Posted: **Thu Aug 27, 2020 4:11 pm**

For the SDRAM add on, why DQMH and DQML connected to A11 and A12?
Tell me why. Ain’t nothing but a mistake??

Posted: **Sat Aug 29, 2020 3:02 pm**

To decrease number of pins needed for the SDRAM.
Some kind of optimization.

For the SDRAM add on, why DQMH and DQML connected to A11 and A12?