MiSTer.ini custom video_mode (modeline) to natively support a 480x272@60 LCD display possible?
Posted: Mon Aug 31, 2020 11:15 pm
Hi, after reading this post https://www.atari-forum.com/viewtopic.php?t=35169 I'm wondering if it would be possible to natively support a 480x272px LCD at 60Hz, similar to the PSP display, to display for instance the GB, NES or SNES cores.
Using this page https://arachnoid.com/modelines/ I can generate the following modeline, which PixelClock is 9.2MHz:
But at the first URL it says the MiSTer minimal frequency starts at 20MHz.
Do you think this modeline (transformed into the "video_mode" line as explained in first URL) could works in the mister.ini when using the RAW RGB Digital_6+6+6bit VIDEO and HSYNC+VSYNC SIGNALS of the GPIO1 of DE10-Nano (usually connected to the IOBoard-analog)?. I mean, the GB, NES and SNES cores native resolutions are 160x144px, 256x240px and 256x224px respectively, and at ~60Hz their PixelClocks are <5MHz, that is, always slower than 20MHz... So, does the video_mode in mister.ini only affect the HDMI output, or also the RAW RGB Digital Video being "scaled" (or not) though the DE10-Nano GPIO1 port?.
On the other side, do you think it would be possible to modify the Cores to output the PixelClock signal out of a GPIO of the FPGA (for instance using any of the secondary SD-Card GPIOs in GPIO1), to feed this kind of 480x272@60 LCD display (which needs this PixelClock input signal to work, in addition to the 6-bits R-G-B, VSYNC and HSYNC signals already available at the DE10-Nano GPIO1 port)?.
Thanks!.
Using this page https://arachnoid.com/modelines/ I can generate the following modeline, which PixelClock is 9.2MHz:
Code: Select all
# 480x272 @ 60.00 Hz (GTF) hsync: 16.92 kHz; pclk: 9.20 MHz
Modeline "480x272_60.00" 9.20 480 472 512 544 272 273 276 282 -HSync +VsyncDo you think this modeline (transformed into the "video_mode" line as explained in first URL) could works in the mister.ini when using the RAW RGB Digital_6+6+6bit VIDEO and HSYNC+VSYNC SIGNALS of the GPIO1 of DE10-Nano (usually connected to the IOBoard-analog)?. I mean, the GB, NES and SNES cores native resolutions are 160x144px, 256x240px and 256x224px respectively, and at ~60Hz their PixelClocks are <5MHz, that is, always slower than 20MHz... So, does the video_mode in mister.ini only affect the HDMI output, or also the RAW RGB Digital Video being "scaled" (or not) though the DE10-Nano GPIO1 port?.
On the other side, do you think it would be possible to modify the Cores to output the PixelClock signal out of a GPIO of the FPGA (for instance using any of the secondary SD-Card GPIOs in GPIO1), to feed this kind of 480x272@60 LCD display (which needs this PixelClock input signal to work, in addition to the 6-bits R-G-B, VSYNC and HSYNC signals already available at the DE10-Nano GPIO1 port)?.
Thanks!.