MiSTer FPGA Forum

I have the following setup:

• Digital IO board 1.2
• USB3.0 Type A male to male cable
• an SPI board linked to USER_IO[2] SCK, USER_IO[3] MISO, USER_IO[4] MOSI, USER_IO[5] CS

I checked with my oscilloscope that all signals reach the SPI board but that information is not send back because USER_IO[3] is held down to GND.

The reason is the following:

• The cable has pin 7 connected to GND_DRAIN and the USB connector shell/bracket. This is correct per specification.
• The IO board has USB connector shell connected to GND and pin 4.
• This essentially links pin 7 which is supposed to be USER_IO[3] always to GND

The standards are not clear about this but the way I understand it GND and GND_DRAIN serve another purpose. A lot of designs however just connect them together which means again that USER_IO[3] cannot be used.

Let me know what you think and what we should do about this.

GND_DRAIN is used as a signal return, GND is used as power return. Connecting the two does sound incorrect on paper, you are right to suspect that. GND only has to be connected, I believe, on one end of the USB cable just to prevent ground loops. So if GND is connected to ground and kept separate from GND_DRAIN on your SPI board/interface that is at the other end of the USB cable, and as long as the USB cable internally hasn't connected GND_DRAIN to GND, you should be fine on that.

However, if you are talking about the User Port on the Digital IO Board, that isn't using the USB 3.0 spec entirely since it's not a USB 3.0-enabled port, it's just serial connection to the headers on the DE10Nano, so this may not matter at all.

Aberu, thanks for your reply.

I guess what I wanted to say is that standard USB3.0 type A male/male cables icw IO board make USER_IO[3] always 0.

So you have to be careful when you think you can output signals because they will be pulled to ground. There is a pull/up and resistor in series in the IOboard so I don't think the Mister will be damaged.

Better not to use USER_IO[3] in our projects.