Can a core send messages to Linux Console?

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dave18
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Can a core send messages to Linux Console?

Unread post by dave18 »

Hi

Trying to get my head around whether this is possible.

To make debugging easier it would be useful if a core could send messages across to linux to be displayed on a serial console running under PuTTY or similar.

I'm trying to work out whether this can be done using the UART connection or maybe there's another way?

Thanks in advance for any help

Dave
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Re: Can a core send messages to Linux Console?

Unread post by dshadoff »

There is indeed messaging, but it's probably little different than you expect.
A number of cores communicate with Main_MiSTer via HPS_IO in order to do things like request data from a disk (etc.).
These communications tend to be similar to SPI or SCSI transactions.

Since space is limited on the FPGA side, you would probably want a discrete set of enumerated constants which would then be interpreted on the linux side (in Main_MiSTer) in order to print text.
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Re: Can a core send messages to Linux Console?

Unread post by dave18 »

ok, so if I understand then there is nothing currently in the HPS interface to do this so I would need to compile a new version of Main_Mister to look out for specific communication than I would also need to build into hps_io.v on the FPGA side?

If I'd need to change Main_MIster I wonder if it is possible to make it simply printf any characters it receives over UART.
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Re: Can a core send messages to Linux Console?

Unread post by dshadoff »

There's no standard universal byte-size bidirectional flow, if that's what you're looking for; the protocol for each type of request would need to be designed on both sides - Main_MiSTer, and your core. But examples already exist in several cores.

You wouldn't need to change hps_io.v; that is a facilitator... you would need to make use of services it already provides.

Look at Main_MiSTer, in support/, and choose a machine you're familiar with; each of the cores with these support folders should have some data passing back-and-forth via functions in these areas. Then look at the corresponding core, to see how those requests are formed.

I haven't implemented any of these myself, but this is how it is done.
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Re: Can a core send messages to Linux Console?

Unread post by dave18 »

OK, thanks for the advice, I'll go and look at some of the other cores
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Re: Can a core send messages to Linux Console?

Unread post by Grabulosaure »

There is a serial port interface in the cores (the UART_xxx signals) that you can use for communications with Linux though /dev/ttyS1.
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Re: Can a core send messages to Linux Console?

Unread post by dave18 »

Thanks Grabulosaure.

I'm already sending test characters over UART in console mode at 115200 baud, I just wasn't sure how to read them on the Linux side (I'm not an experienced Linux user). Hopefully now I know what device to read I can find a way to display the characters sent to /dev/ttyS1
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Re: Can a core send messages to Linux Console?

Unread post by hostile »

how did your progress go here? This is relevant to some things I am considering working on.
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Re: Can a core send messages to Linux Console?

Unread post by Bas »

You can essentially just 'cat' the serial device on the Linux side and pipe characters into whatever once there.

#cat /dev/ttyS1

.. should hog your terminal and echo any characters you send through from the other end.
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gregben
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Re: Can a core send messages to Linux Console?

Unread post by gregben »

;) Does Minicom run on MiSTer? If so, minicom can easily enough attach to any /dev/tty device and output will appear on whatever your console is, whether via ssh login over ethernet or the HDMI port and a keyboard attached via USB. If you put a soft processor in the FPGA, you can put a CLI on that processor and have interactive two-way serial communications with your core. Not that I know how to actually do it yet. ;)
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Re: Can a core send messages to Linux Console?

Unread post by Sorgelig »

FPGA is not a CPU. There is nothing which can send the messages as it's not a centralized system. It's not like CPU stepping through every piece of code and where you can add your own debug function to output some info.
Even sending message through UART is challenging as there is nothing on FPGA side which can do it. You can of course instantiate some softcore CPU on FPGA, write the code for it to control UART, then again this CPU won't be able to monitor other pieces of FPGA unless you will connect some specific trigger on FPGA to monitor its state. But you can't connect every trigger as they are too many..

FPGA side has its own monitor tool called SignalTap. Still it's quite different from what CPU programmer expects. You have to get used to debugging environment of FPGA. It's quite different from traditional CPU systems.
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