Limits of the DE10 Nano board?
Posted: Mon Feb 15, 2021 11:54 am
Hi all
I'm the recent owner of a DE10 Nano board, and even though I'm an IT guy I have no clues about low-level circuits/chips design, let alone how to implement them using an FPGA... So I'm trying to learn something new, here.
Question for the pros: I've been wondering how an FPGA like the Cyclone - with 110k logic elements - can replicate chips like a 486sx, which was made of over 1M transistor if I recall that correctly.
Since such a core does exist (ao486) I guess the number of logic elements doesn't directly relate (1:1) to the number of transistors in a CPU/chip, but I'm still very curious to learn how that works
Any pointers for me please?
Thanks in advance!
I'm the recent owner of a DE10 Nano board, and even though I'm an IT guy I have no clues about low-level circuits/chips design, let alone how to implement them using an FPGA... So I'm trying to learn something new, here.
Question for the pros: I've been wondering how an FPGA like the Cyclone - with 110k logic elements - can replicate chips like a 486sx, which was made of over 1M transistor if I recall that correctly.
Since such a core does exist (ao486) I guess the number of logic elements doesn't directly relate (1:1) to the number of transistors in a CPU/chip, but I'm still very curious to learn how that works
Any pointers for me please?
Thanks in advance!