MiSTer FPGA Forum

why do some cores let you choose between the DE10 ram and the Ram Module? I only have a 32mb module and because of this some games on some cores dont work properly but its these cores that seem to lack the option... are there any test builds of such cores that allow for using DE10s ram? and before you all jump on me with buy ram - I have just had to move house under exceptional circumstnaces I dont have a pot to piss in as the saying goes!

The latency for the FPGA fabric to access the HPS RAM is higher, and the rules governing the overall timing are more complex because it's shared with the ARM cores. Some system architectures are relatively easy to adapt to this, whereas with others trying to do so is almost guaranteed to cause something to malfunction. Basically, some (sub)systems have variable memory access time built into their architecture; in others the memory access time sort of arises as a side effect of other operations that run on fixed timing (e.g. a graphics processor's pixel clock or a CPU clock that's a fixed ratio of a master clock).

Even when the system architecture is amenable to it, it's extra developer effort to support both, and timing accuracy typically suffers when using HPS RAM, so it's typically not preferred even when it's feasible.