MiSTer FPGA Forum

Just thought I would write a short update on the progress of the Next186 MiSTer core.

Conversion to MiSTer is done, and the core is compiling. The video is generating a black screen, so demonstrates that the core is running on the MiSTer.
The bios code includes a bootloader, and is fed into the core via the hps as it should be. Most of the clocks appear in place, but based on the timings from MiST. They might be one of the reasons why theres no output yet.

The next step is really to start debugging the startup of the core, using either Signaltap, or Verilator. The second option requires the vhdl files converted to verilog, but there are some auto translators around to do most of that work.

Its a complex core, so will take a while with debugging to make sure I havent made any stupid mistakes anywhere. Thanks to the help other core devs are offering, things are moving along.

On a positive note: the fpga utilization once compiled is at 33%, so lots of room still to add new features over time.

Excellent, thanks! Looking forward to seeing the final product!

I'm really looking forward to this core!

Thanks a lot, I just can't wait to test it.

Great, thanks!!!

Really looking forward to this one! Is there any documentation or basic writeup of some of the difference between this and the ao486 core? What sound options will be supported, graphics modes, etc?

Edit: Should have googled of course, found a good listing here of features: https://opencores.org/projects/next186_soc_pc

AntialiasedPixel wrote: ↑Thu Apr 21, 2022 12:01 am Is there any documentation or basic writeup of some of the difference between this and the ao486 core? What sound options will be supported, graphics modes, etc?

It's a port of the MiST core, there is a list of features in the readme:
https://github.com/mist-devel/mist-bina ... es/next186

I've tried Next186 with no luck (I'm using the VGA out) is anyone knows if this core works with the VGA output ? Or does it work only with HDMI out ?
Thanks.

The provided link is for the MIST core isn't it?
Is there a MISTer core floating around?

jca wrote: ↑Thu Apr 21, 2022 6:05 pm Is there a MISTer core floating around?

It's only at the point where it generates a black screen. It has a ways to go.

Pretty much everything is wired up ready to go and get the core running.

Working through the debugging daily on this core, as you can see in the image. Bios was loading in the wrong order, so fixed that now.

No new code is needed to be written, its mostly debugging work now.

I will keep you all updated.

dmckean wrote: ↑Thu Apr 21, 2022 6:39 pm

jca wrote: ↑Thu Apr 21, 2022 6:05 pm Is there a MISTer core floating around?

It's only at the point where it generates a black screen. It has a ways to go.

Thanks. I was just curious as I doubt kathleen was trying to use the MIST core and thus there had to be a MISTer core somewhere.
I am not in a hurry to test it and rather prefer the developers take their time to produce a working one.
Not that I am not be interested in this core for a long time:
viewtopic.php?p=28893#p28893

One of the methods that can be used for debugging is the use of the MiSTer's 7 built-in LEDs. In this sense, I have modified your code to give access via I/O port 99h to the LEDs, I attached in this post.

The idea is to mark the different steps up to and beyond video initialisation:
However, as far as I have been able to observe, if I have not made any mistakes in the implementation and reading of the port, the BIOS does not even get to step 1, marked right at the beginning:
Therefore, you can start by making sure that the BIOS is indeed correctly initialised and the first instructions are executed. But I repeat, as long as I have not made any mistakes during the implementation of these accesses to I/O port 99h, I have not been able to check much more at the moment.

I have fixed a issue in the implementation, and now it is working correctly... I attach it again.

Apparently, it does step 1 but doesn't get to step 2:
This indicates that somewhere in this code, it hangs.

False alarm, it has another bug which I have fixed. I attached it again... and now, yes, I think we can confirm that the BIOS does not run, at least not the first instructions:

spark2k06 wrote: ↑Tue May 10, 2022 6:09 am This indicates that somewhere in this code, it hangs.

just out of interest, has the stack pointer been setup before you start doing the PUSH and POP commands ?

Sorry, I cant answer that @macro, @spark2k06 probably can.

I am starting to assume that the clock timings are the issue with this core. I can see similarities with these sensitive clocks when attempting to verilate on the PCXT core. Both of these cores have 5 clocks. I had read elsewhere that the cache megafunction in the Next186 is sensitive to change too, and attempting to convert that to a conventional module (without proven video out first) could make matters worse.

Most of the cores we verilate have one or two clocks, and are straightforward.

I have debugged pretty much everything else, and this seems to be the final hurdle.

macro wrote: ↑Fri May 13, 2022 9:23 pm just out of interest, has the stack pointer been setup before you start doing the PUSH and POP commands ?

Yes, the first BIOS instructions are precisely the following:

Any news about this promising core? It will reproduce also 286 cpu?