MiSTer FPGA Forum

It's a well known fact that while A500 on Minimig core can run at the original speed, A1200 is somewhat faster.
For the most part it is a good thing, but I believe having more control over the core's speed would be beneficial. It could possibly help tackling problems with some of the glitchy/too fast software, as well as simply being a more faithful representation of the original A1200.

Till now I wasn't aware that one of the Minimig's most respected devs, robinson5, has been actively working on
tackling this issue on the MiST / SiDi side of things. His current iteration of the core has a toggle with several speed settings. While not cycle-exact, one of them can bring the A1200 much closer to the original 14Mhz speed. You can read more about it here.

Here's hoping this can be eventually implemented in the MiSTer's version of Minimig.

Surely the A1200 issues comes from the TG68k 020 cpu module which is not cycle accurate but it is the only open source option
A500 uses FX68k which is cycle accurate

The chip set implementation is still not 100% accurate which also might cause issues

The Amiga was tolerant of faster processors by the 1200. Quite a few people had accelerator cards by then and so the games were not written so they run on a 68020 only. It would be nice though to get a FPGA implementation thats as accurate as WinUAE, but it depends on someone knowledgeable of the Amiga and the Mister and those people are rare.

Its currently good enough

It's quite amusing to read about things being "good enough" regarding a platform of which one of the major selling points is accuracy, while an experienced Amiga developer is actively tackling this subject, and working code already exists.

In any case the purpose of this thread is not starting yet another squabble about this topic, but a) to inform people who actually care about it b) hope that this can maybe nudge things in the direction of implementing these changes on the MiSTer side.

Processor speed is not the major problem though. The Core AGA timing are off, I also think the ECS timings are off.

akeley wrote: ↑Sat Jan 13, 2024 1:11 pm

It's quite amusing to read about things being "good enough" regarding a platform of which one of the major selling points is accuracy, while an experienced Amiga developer is actively tackling this subject, and working code already exists.

In any case the purpose of this thread is not starting yet another squabble about this topic, but a) to inform people who actually care about it b) hope that this can maybe nudge things in the direction of implementing these changes on the MiSTer side.

Alastair has been working with the Minimig core for years, He is the person that ported it to the Turbo Chameleon

As its been explained clock speed or throttle wont solve all the issues with the core and some of these go back years, The Minimig core started life around 20 years ago. There is also no replacement for TG68k that is open source , any improvements he makes can be merged though

Armakuni wrote: ↑Sat Jan 13, 2024 5:28 pm

Alastair has been working with the Minimig core for years, He is the person that ported it to the Turbo Chameleon

As its been explained clock speed or throttle wont solve all the issues with the core and some of these go back years, The Minimig core started life around 20 years ago. There is also no replacement for TG68k that is open source, any improvements he makes can be merged though.

I'm not quite sure what is the point of your reply, since all of this is quite obvious.