MiSTer FPGA Forum

Hello there,

The current SID implementation on the C64 core sounds fantastic to me, filters and all.

But there's this other supposedly cycle-exact C64 SID implementation, based on the fantastic ReSID engine:
https://github.com/daglem/reDIP-SID

I have been trying to compare them for hours without being able to decide which is better: the reDIP-SID can be tested on the tangnano20k using this branch of it's C64 core: https://github.com/vossstef/tang_nano_2 ... id-usecase

What's supposed to be more accurate nowadays? MiSTer C64 SID or reDIP-SID?

NOTE: Even our master, Sorgelig, was interested in reDIP-SID last year! --> https://github.com/daglem/reDIP-SID/issues/8

You're comparing apples to apples The C64 core's SID implementation is already based on reDip SID according to the copyright messages in the source:

https://github.com/MiSTer-devel/C64_MiS ... sid_dac.sv

eriks5 wrote: ↑Thu Jun 13, 2024 11:25 am

You're comparing apples to apples The C64 core's SID implementation is already based on reDip SID according to the copyright messages in the source:

https://github.com/MiSTer-devel/C64_MiS ... sid_dac.sv

Good catch! But I believe it's perfected from the 2022 version of reDIP SID, so both implementations diverged, right?

Yes it seems it diverged at some point in 2022/2023. And not all source files in the C64 core contain the reDIP copyright message, so looks like only parts of it were used. Probably only Sorgelig knows for sure.