NARC News?
Saw this was being worked on a good while back...anyone heard anything more recent? This is one of my personal Holy Grail titles.
The online community for MiSTer FPGA enthusiasts
https://misterfpga.org/
Saw this was being worked on a good while back...anyone heard anything more recent? This is one of my personal Holy Grail titles.
Unfortunately development for MiSTer was abandoned in favour of the Analogue Pocket. Pramod has been clear that the DE10-Nano just doesn't have the memory bandwidth to accommodate NARC, Mortal Kombat etc.
There has been a lot of very salty backlash about it, especially due to Pramod's association with the MARS FPGA project and a perceived bias there. It's all very silly.
Being open source, maybe someone could try a different interleaving/pre-fetch/writeback approach, even if not being 100% accurate.
Is it out on the Pocket?
I haven’t watched the video yet
But it looks like PCN is playing it on the AP
https://youtu.be/62tg-pV5baY?si=-fVNIAtZ_7u3IDNZ
I look forward to the source being released so I can ask one of the other experienced MiSTer devs to take a second look at it. I'm not convinced that it's utterly impossible, but it is certainly extremely challenging and I don't think it's good for anyone to be acting entitled and salty about it not coming to MiSTer by pramod's hand. The pocket has a lower capability FPGA, but it has multiple types of memory that can be accessed directly from the FPGA simultaneously, so it was probably significantly easier to make this work.
If we had a 2nd SRAM (not SDRAM) board, maybe it would be enough to help?
It also might not be possible, don't know till someone with a second eye for it tries and possibly fails.
aberu wrote: ↑Sun Sep 08, 2024 2:44 pmI look forward to the source being released so I can ask one of the other experienced MiSTer devs to take a second look at it. I'm not convinced that it's utterly impossible, but it is certainly extremely challenging and I don't think it's good for anyone to be acting entitled and salty about it not coming to MiSTer by pramod's hand. The pocket has a lower capability FPGA, but it has multiple types of memory that can be accessed directly from the FPGA simultaneously, so it was probably significantly easier to make this work.
If we had a 2nd SRAM (not SDRAM) board, maybe it would be enough to help?
It also might not be possible, don't know till someone with a second eye for it tries and possibly fails.
We have srg320's Battletoads, which uses a similar CPU/DSP (1), it could be a starting point.
(1) https://github.com/srg320/Arcade-Battletoads_MiSTer
https://github.com/srg320/TMS320C1X
https://github.com/srg320/TMS34020
Edit: added links to TMS320 and TMS340 cores used by Battletoads
Is Prams code open source though? I thought that was the whole part of Mars it was going to closed.
If it is open, and on git or where-ever, maybe someone can optimize it.
Talking of silliness, you should see the slagfest on Twitter between him and JT.
As far as I know, it's not open source (at this time, anyway).
And even if it were, sometimes it's easier to write from scratch than modify somebody else's code, especially when there's any sort of large change needed.