MiSTer FPGA Forum

MARl0 wrote: ↑Mon Nov 11, 2024 11:02 pm

Basically when loading the core, loading save states only seems to work after you create a save state. This behavior did not occur with the previous save state core.

Thanks for your report. I think I know what this is. You should also be able to work around this by loading another slot first, even if that slot does not contain a save state.

paulbnl wrote: ↑Wed Nov 13, 2024 4:14 pm

MARl0 wrote: ↑Mon Nov 11, 2024 11:02 pm

Basically when loading the core, loading save states only seems to work after you create a save state. This behavior did not occur with the previous save state core.

Thanks for your report. I think I know what this is. You should also be able to work around this by loading another slot first, even if that slot does not contain a save state.

Nice, that work around does indeed work! Definitely better than what my work around was. Looking forward to further updates!

This is really cool! Tested it out and it seems to work great. Just wanted to note that this seemed to fix some other issues I was having with SA1 roms on the stable build. Thank you paulbnl

Update:

The savestates.bin file is now auto loaded as boot1.rom. This requires unstable Main from today.
Fixed first state load after core load.
Add DSP cart support.

Nice! Just tested this out, and the previous issue I mentioned is indeed fixed. Plus I tested Pilotwings (DSP chip game) and it works as well! Incredible progress on this.

amazing work! it's working perfectly! you have so much talent!

I somehow missed this announcement. This really made my day! I've gotten so spoiled by having save states through software emulators that I couldn't help but miss it on the MiSTer. Thank you so much for working on this!!